Inventor

BLAGODUROV SERGEY

US55 patents

⚠️ This page may combine multiple inventors who share the name “BLAGODUROV SERGEY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BLAGODUROV SERGEY

ADVANCED MICRO DEVICES INC

Scheduling of data migration

Memory module with embedded access metadata

Hot page selection in multi-level memory hierarchies

Method and apparatus for recovering regular access performance in fine-grained DRAM

Method and apparatus for monitoring memory access traffic

Methods for configuring span of control under varying temperature

Data placement with packet metadata

Encoding of symbols for a computer interconnect based on frequency of symbol values

Enhanced method for a useful blockchain consensus

Hardware assisted memory profiling aggregator

Method for a reliability, availability, and serviceability-conscious huge page support

Dynamic configuration of inter-chip and on-chip networks in cloud computing system

Method and apparatus for data protection in memory devices

Hardware assisted memory profiling aggregator

Using multiple memory elements in an input-output memory management unit for performing virtual address to physical address translations

Method for a reliability, availability, and serviceability-conscious huge page support

Dynamic configuration of inter-chip and on-chip networks in cloud computing system

Multi-processor apparatus and method of detection and acceleration of lagging tasks

Adaptive extension of leases for entries in a translation lookaside buffer

Compacted addressing for transaction layer packets

Temporal link encoding

Method and apparatus for recovering regular access performance in fine-grained DRAM

Alleviating interconnect traffic in a disaggregated memory system

Alleviating interconnect traffic in a disaggregated memory system

Arbitrating atomic memory operations

Data as compute

Adaptive memory consistency in disaggregated datacenters

Multi-instance recurrent neural network prediction

Adaptive cache management based on programming model information

Limited propagation of unnecessary memory updates

IOMMU collocated resource manager

Low latency offloading of collectives over a switch

Traffic aware smart caching in fabric switches

Prioritization of memory traffic for multi-process workloads

Redirecting data to improve page locality in a scalable data fabric

Ephemeral data management for cloud computing systems using computational fabric attached memory

Connection modification based on traffic pattern

Communication engine for hybrid interconnect technologies

Apparatus and methods for managing packet transfer across a memory fabric physical layer interface

Using multiple memory elements in an input-output memory management unit for performing virtual address to physical address translations

Mechanism of identifying available memory resources in a network of multi-level memory modules

Method and apparatus for workload placement on heterogeneous systems

Traffic rate control for inter-class data migration in a multiclass memory system

Pinning objects in multi-level memory hierarchies

Predicting a context portion to move between a context buffer and registers based on context portions previously used by at least one other thread

Method and apparatus for performing inter-lane power management

Selective workgroup wake-up based on synchronization mechanism identification with high contention scenario

BLAGODUROV SERGEY

Maximizing server utilization within a datacenter

ATI TECHNOLOGIES ULC

NVRAM-aware data processing system

HEWLETT PACKARD DEVELOPMENT CO

Weight-based collocation management