Inventor

SHOJI MASAKAZU

US38 patents

⚠️ This page may combine multiple inventors who share the name “SHOJI MASAKAZU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHOJI MASAKAZU

AT & T BELL LAB

Integrated circuits which compensate for local conditions

Chipset synchronization arrangement

VLSI Chip with ground shielding

Skew-free clock circuit for integrated circuit chip

Databus coupling arrangement using transistors of complementary conductivity type

CMOS logic circuit with single clock pulse

Synthetic CMOS static logic gates

IC chip with noise suppression circuit

Integrated circuit including logic array with distributed ground connections

BELL TELEPHONE LABOR INC

Integrated circuit binary weighted digital-to-analog converter

Piezoresistor effects in semiconductor resistors

Apparatus for increasing the speed of a circuit having a string of IGFETs

Microprocessor architecture for improved chip testability

Complementary field-effect transistor integrated circuit device

Single terminal negative capacitance generator for response time enhancement

Microprocessor architecture having internal access means

AMERICAN TELEPHONE & TELEGRAPH

Dual domino CMOS logic circuit, including complementary vectorization and integration

CMOS Integrated circuit digital crossbar switching arrangement

Apparatus including resonant-tunneling device having multiple-peak current-voltage characteristics

Circuit arrangement for controlling threshold voltages in CMOS circuits

High speed MOS circuits

Chain logic scheme for programmed logic array

LUCENT TECHNOLOGIES INC

High-density read-only memory

Digital signal transition edge alignment using interacting inverter chains

Memory chip architecture and packaging method for increased production yield

Semiconductor optical storage device and uses thereof

Fixed-interval timing circuit and method

AT & T CORP

Integrated circuit memory device

High-density read-only memory employing multiple bit-line interconnection

High-density read-only memory fabrication

MITSUBISHI ELECTRIC CORP

In-vehicle information apparatus

Gate-processed moldings

Vehicle-mounted electronic apparatus

AGERE SYST GUARDIAN CORP

Optimized low voltage CMOS operation

Unidirectionality in electronic circuits through feedback

AGERE SYSTEMS INC

Process-tolerant integrated circuit design

AT & T LAB

CMOS Logic circuits with all pull-up transistors integrated in separate chip from all pull-down transistors

SHOJI MASAKAZU

Vehicle-mounted information apparatus