Inventor
KESHLEAR WILLIAM M
US7 patents
Patents
7 patentsUS4800489AJan 24, 1989
Paged memory management unit capable of selectively supporting multiple address spaces
MOTOROLA INC61 citations95
US4763244AAug 9, 1988
Paged memory management unit capable of selectively supporting multiple address spaces
MOTOROLA INC60 citations95
US4473878ASep 25, 1984
Memory management unit
MOTOROLA INC126 citations94
US4763250AAug 9, 1988
Paged memory management unit having variable number of translation table levels
MOTOROLA INC54 citations92
US4488256ADec 11, 1984
Memory management unit having means for detecting and preventing mapping conflicts
MOTOROLA INC44 citations91
US4727485AFeb 23, 1988
Paged memory management unit which locks translators in translation cache if lock specified in translation table
MOTOROLA INC34 citations90
US4477871AOct 16, 1984
Global operation coordination method and circuit
MOTOROLA INC8 citations72