P

Inventor

SCHIFFLEGER ALAN J

US17 patents

Patents

17 patents
US4901230AFeb 13, 1990

Computer vector multiprocessing control with multiple access memory and priority conflict resolution method

CRAY RESEARCH INC87 citations96
US4745545AMay 17, 1988

Memory reference control in a multiprocessor

CRAY RESEARCH INC64 citations96
US4661900AApr 28, 1987

Flexible chaining in vector processor with selective use of vector registers as operand and result registers

CRAY RESEARCH INC95 citations96
US5170370ADec 8, 1992

Vector bit-matrix multiply functional unit

CRAY RESEARCH INC80 citations95
US5481746AJan 2, 1996

Vector shift functional unit for successively shifting operands stored in a vector register by corresponding shift counts stored in another vector register

CRAY RESEARCH INC56 citations94
US5920714AJul 6, 1999

System and method for distributed multiprocessor communications

CRAY RESEARCH INC28 citations92
US5526487AJun 11, 1996

System for multiprocessor communication

CRAY RESEARCH INC33 citations92
US5434970AJul 18, 1995

System for distributed multiprocessor communication

CRAY RESEARCH INC33 citations92
US5142638AAug 25, 1992

Apparatus for sharing memory in a multiprocessor system

CRAY RESEARCH INC43 citations92
US6098162AAug 1, 2000

Vector shift functional unit for successively shifting operands stored in a vector register by corresponding shift counts stored in another vector register

CRAY RESEARCH INC39 citations91
US5848286ADec 8, 1998

Vector word shift by vo shift count in vector supercomputer processor

CRAY RESEARCH INC37 citations91
US5247637ASep 21, 1993

Method and apparatus for sharing memory in a multiprocessor system

CRAY RESEARCH INC27 citations91
US4636942AJan 13, 1987

Computer vector multiprocessing control

CRAY RESEARCH INC111 citations91
US5367690ANov 22, 1994

Multiprocessing system using indirect addressing to access respective local semaphore registers bits for setting the bit or branching if the bit is set

CRAY RESEARCH INC18 citations82
US5371879ADec 6, 1994

Apparatus and method for testing of new operating systems through priviledged instruction trapping

CRAY RESEARCH INC16 citations73
US5202970AApr 13, 1993

Method for sharing memory in a multiprocessor system

CRAY RESEARCH INC17 citations73
US5390300AFeb 14, 1995

Real time I/O operation in a vector processing computer system by running designated processors in privileged mode and bypass the operating system

CRAY RESEARCH INC16 citations69