Inventor

VILLA CORRADO

IT80 patents

⚠️ This page may combine multiple inventors who share the name “VILLA CORRADO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

VILLA CORRADO

MICRON TECHNOLOGY INC

Apparatuses and methods for memory operations having variable latencies

Providing power availability information to memory

Providing power availability information to memory

Apparatuses and methods for memory operations having variable latencies

Providing power availability information to memory

Providing power availability information to memory

Providing power availability information to memory

Apparatuses and methods for memory operations having variable latencies

Providing power availability information to memory

Apparatuses and methods for performing multiple memory operations

Apparatuses and methods for memory operations having variable latencies

Providing power availability information to memory

Systems and methods for adaptive self-referenced reads of memory devices

Vertical 3D memory device and method for manufacturing the same

Method and apparatuses for performing a voltage adjustment operation on a section of memory cells based on a quantity of access operations

Apparatuses and methods for memory operations having variable latencies

Variable page size architecture

Memory plate segmentation to reduce operating power

Apparatuses and methods for performing multiple memory operations

Variable page size architecture

Decoder architecture for memory device

Variable page size architecture

Systems and methods for adaptive self-referenced reads of memory devices

SGS THOMSON MICROELECTRONICS

Memory cell reading circuit

CMOS voltage multiplier

Device for generating and regulating a gate voltage in a non-volatile memory

Method for erasing an electrically programmable and erasable non-volatile memory cell

Flash EEPROM with controlled discharge time of the word lines and source potentials after erase

Erase voltage control circuit for an electrically erasable non-volatile memory cell

Regulation of the output voltage of a voltage multiplier

Regulation of the output voltage of a voltage multiplier

Supply voltages switch circuit

Sectorized electrically erasable and programmable non-volatile memory device with redundancy

Negative word line voltage regulation circuit for electrically erasable semiconductor memory devices

CMOS logic circuit for high voltage operation

Method and circuit for generating a synchronizing ATD signal

ST MICROELECTRONICS SRL

Sensing circuitry for reading and verifying the contents of electrically programmable/erasable non-volatile memory cells

Full-swing wordline driving circuit

Flash EEPROM with on-chip erase source voltage generator

Sensing circuitry for reading and verifying the contents of electrically programmable/erasable non-volatile memory cells

Electrically erasable and programmable non-volatile memory device with testable redundancy circuits

Flash EEPROM with controlled discharge time of the word lines and source potentials after erase

Flash-EEPROM memory array and method for biasing the same

Redundancy scheme for a memory integrated circuit

Method of avoiding disturbance during the step of programming and erasing an electrically programmable, semiconductor non-volatile storage device

Non-volatile memory device

Flash EEPROM with on-chip erase source voltage generator

Negative word line voltage regulation circuit for electrically erasable semiconductor memory devices

VILLA CORRADO

Method and devices for controlling power loss

LODESTAR LICENSING GROUP LLC

Providing power availability information to memory