Inventor

ATSUMI SHIGERU

JP126 patents

⚠️ This page may combine multiple inventors who share the name “ATSUMI SHIGERU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ATSUMI SHIGERU

TOSHIBA KK

Semiconductor integrated circuit device

Nonvolatile semiconductor memory device having a word line to which a negative voltage is applied

Nonvolatile semiconductor memory device

Nonvolatile semiconductor memory device having row decoder supplying a negative potential to word lines during erase mode

Boosted voltage generating circuit and semiconductor memory device having the same

Non-volatile semiconductor memory

Boosted voltage generating circuit and semiconductor memory device having the same

Power supply circuit and semiconductor memory device having the same

Pump circuit with active-mode and stand-by mode booster circuits

Power supply circuit and semiconductor memory device having the same

Semiconductor integrated circuit device

Data-erasable non-volatile semiconductor memory device

Booster circuit and semiconductor memory device having the same

Nonvolatile semiconductor memory device having row decoder

Power supply circuit and semiconductor memory device having the same

Nonvolatile semiconductor memory device having row decoder

Semiconductor integrated circuit device having a booster circuit and a storage device

Semiconductor integrated circuit device with a constant current source

Nonvolatile semiconductor memory device

High voltage generator circuit

Nonvolatile semiconductor memory device having a row decoder supplying a negative potential to word lines during erase mode

Address detector of a redundancy memory cell

Nonvolatile semiconductor memory having a stress test circuit

Nonvolatile semiconductor memory having page mode programming function

Semiconductor memory device with testing of redundant memory cells

Nonvolatile semiconductor memory in which the number of programming or erasing bits increases with the progress of programming or erasing

Semiconductor intergrated circuit device with a main cell array and a fuse cell array whose word lines and bit lines are extended in the same directions

Semiconductor device including semiconductor memory

Non-volatile semiconductor memory

Non-volatile semiconductor memory

Nonvolatile semiconductor memory with a page mode

Semiconductor integrated circuit device with operation/function setting information memory

Nonvolatile semiconductor memory having page mode with a plurality of banks

Channel-erase nonvolatile semiconductor memory device

Nonvolatile semiconductor memory device

Voltage-level shifter and semiconductor memory using the same

Semiconductor memory device for effecting erasing operation in block unit

Channel-erase nonvolatile semiconductor memory device

Semiconductor memory device

Latch type level shift circuit

Pump circuit with reset circuitry

Non-volatile semiconductor memory having column sub-selector layout pattern adaptable to miniaturization of memory cell

Semiconductor memory device

Semiconductor integrated circuit device and storage device

Nonvolatile semiconductor memory system

Semiconductor memory device

Constant voltage generating circuit with improved line voltage control

High voltage generator circuit

Nonvolatile semiconductor memory device having row decoder supplying a negative potential to wordlines during erase mode

TOKYO SHIBAURA ELECTRIC CO

Circuit for changing the voltage level of binary signals