Inventor

VAN BENTUM RALF

DE19 patents

⚠️ This page may combine multiple inventors who share the name “VAN BENTUM RALF”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

VAN BENTUM RALF

ADVANCED MICRO DEVICES INC

Advanced technique for forming a transistor having raised drain and source regions

Semiconductor-on-insulator (SOI) device having source/drain silicon-germanium regions and method of manufacture

Technique for forming transistors having raised drain and source regions with different heights

Semiconductor-on-insulator (SOI) device having source/drain silicon-germanium regions

SOI MOSFET with asymmetrical source/body and drain/body junctions

Multi-thickness silicon films on a single semiconductor-on-insulator (SOI) chip using simox

Technique for forming contacts for buried doped regions in a semiconductor device

Method of manufacturing a trench isolation structure for a semiconductor device with a different degree of corner rounding

SOI MOSFET with graded source/drain silicide

Technique for forming a transistor having raised drain and source regions with a reduced number of process steps

Method for reducing silicide defects by removing contaminants prior to drain/source activation

GLOBALFOUNDRIES INC

Semiconductor structure including a ferroelectric transistor and method for the formation thereof

Semiconductor structure including a split gate nonvolatile memory cell and a high voltage transistor, and method for the formation thereof

Semiconductor structure including a ferroelectric transistor and method for the formation thereof

Transistor having a channel with biaxial strain induced by silicon/germanium in the gate electrode

Method of forming a semiconductor structure including a ferroelectric material and semiconductor structure including a ferroelectric transistor

VAN BENTUM RALF

Trench isolation structure having different stress

Method of improving memory cell device by ion implantation

PRUEFER EKKEHARD

Drain/source extension structure of a field effect transistor with reduced boron diffusion