Inventor
MAAYAN EDUARDO
IL50 patents
⚠️ This page may combine multiple inventors who share the name “MAAYAN EDUARDO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SAIFUN SEMICONDUCTORS LTD
40 patentsUS6490204B2Dec 3, 2002
Programming and erasing methods for a reference cell of an NROM array
SAIFUN SEMICONDUCTORS LTD147 citations99
US6292394B1Sep 18, 2001
Method for programming of a semiconductor memory cell
SAIFUN SEMICONDUCTORS LTD199 citations99
US6577514B2Jun 10, 2003
Charge pump with constant boosted output voltage
SAIFUN SEMICONDUCTORS LTD75 citations98
US6396741B1May 28, 2002
Programming of nonvolatile memory cells
SAIFUN SEMICONDUCTORS LTD177 citations98
US6677805B2Jan 13, 2004
Charge pump stage with body effect minimization
SAIFUN SEMICONDUCTORS LTD95 citations97
US6636440B2Oct 21, 2003
Method for operation of an EEPROM array, including refresh thereof
SAIFUN SEMICONDUCTORS LTD83 citations97
US6535434B2Mar 18, 2003
Architecture and scheme for a non-strobed read sequence
SAIFUN SEMICONDUCTORS LTD97 citations97
US7532529B2May 12, 2009
Apparatus and methods for multi-level sensing in a memory array
SAIFUN SEMICONDUCTORS LTD49 citations96
US6917544B2Jul 12, 2005
Multiple use memory chip
SAIFUN SEMICONDUCTORS LTD53 citations96
US6885585B2Apr 26, 2005
NROM NOR array
SAIFUN SEMICONDUCTORS LTD52 citations96
US6829172B2Dec 7, 2004
Programming of nonvolatile memory cells
SAIFUN SEMICONDUCTORS LTD68 citations96
US6633496B2Oct 14, 2003
Symmetric architecture for memory cells having widely spread metal bit lines
SAIFUN SEMICONDUCTORS LTD71 citations96
US6614692B2Sep 2, 2003
EEPROM array and method for operation thereof
SAIFUN SEMICONDUCTORS LTD46 citations96
US6584017B2Jun 24, 2003
Method for programming a reference cell
SAIFUN SEMICONDUCTORS LTD82 citations96
US7535765B2May 19, 2009
Non-volatile memory device and method for reading cells
SAIFUN SEMICONDUCTORS LTD19 citations93
US7489562B2Feb 10, 2009
Multiple use memory chip
SAIFUN SEMICONDUCTORS LTD13 citations93
US7257025B2Aug 14, 2007
Method for reading non-volatile memory cells
SAIFUN SEMICONDUCTORS LTD42 citations93
US6633499B1Oct 14, 2003
Method for reducing voltage drops in symmetric array architectures
SAIFUN SEMICONDUCTORS LTD36 citations93
US7184313B2Feb 27, 2007
Method circuit and system for compensating for temperature induced margin loss in non-volatile memory cells
SAIFUN SEMICONDUCTORS LTD45 citations92
US6864739B2Mar 8, 2005
Charge pump stage with body effect minimization
SAIFUN SEMICONDUCTORS LTD17 citations92
US6791396B2Sep 14, 2004
Stack element circuit
SAIFUN SEMICONDUCTORS LTD43 citations92
US6781897B2Aug 24, 2004
Defects detection
SAIFUN SEMICONDUCTORS LTD24 citations92
US7064983B2Jun 20, 2006
Method for programming a reference cell
SAIFUN SEMICONDUCTORS LTD19 citations91
US7738304B2Jun 15, 2010
Multiple use memory chip
SAIFUN SEMICONDUCTORS LTD8 citations84
US7190620B2Mar 13, 2007
Method for operating a memory device
SAIFUN SEMICONDUCTORS LTD16 citations84
US7573745B2Aug 11, 2009
Multiple use memory chip
SAIFUN SEMICONDUCTORS LTD6 citations74
US7466594B2Dec 16, 2008
Dynamic matching of signal path and reference path for sensing
SAIFUN SEMICONDUCTORS LTD6 citations74
US7457183B2Nov 25, 2008
Operating array cells with matched reference cells
SAIFUN SEMICONDUCTORS LTD4 citations74
US7366025B2Apr 29, 2008
Reduced power programming of non-volatile cells
SAIFUN SEMICONDUCTORS LTD7 citations74
US7095655B2Aug 22, 2006
Dynamic matching of signal path and reference path for sensing
SAIFUN SEMICONDUCTORS LTD9 citations74
US6954382B2Oct 11, 2005
Multiple use memory chip
SAIFUN SEMICONDUCTORS LTD5 citations74
US6430077B1Aug 6, 2002
Method for regulating read voltage level at the drain of a cell in a symmetric array
SAIFUN SEMICONDUCTORS LTD9 citations74
US7755938B2Jul 13, 2010
Method for reading a memory array with neighbor effect cancellation
SAIFUN SEMICONDUCTORS LTD6 citations69
US7599227B2Oct 6, 2009
Reduced power programming of non-volatile cells
SAIFUN SEMICONDUCTORS LTD3 citations63
US7256438B2Aug 14, 2007
MOS capacitor with reduced parasitic capacitance
SAIFUN SEMICONDUCTORS LTD5 citations63
US7518908B2Apr 14, 2009
EEPROM array and method for operation thereof
SAIFUN SEMICONDUCTORS LTD4 citations62
US6928527B2Aug 9, 2005
Look ahead methods and apparatus
SAIFUN SEMICONDUCTORS LTD2 citations62
US7400529B2Jul 15, 2008
Non-volatile memory cell and non-volatile memory device using said cell
SAIFUN SEMICONDUCTORS LTD0 citations52
US7148739B2Dec 12, 2006
Charge pump element with body effect cancellation for early charge pump stages
SAIFUN SEMICONDUCTORS LTD1 citations52
US7512009B2Mar 31, 2009
Method for programming a reference cell
SAIFUN SEMICONDUCTORS LTD0 citations51