Inventor

LIU ZHIZHENG

US50 patents

⚠️ This page may combine multiple inventors who share the name “LIU ZHIZHENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIU ZHIZHENG

SPANSION LLC

Method of programming a flash memory device using multilevel charge storage

Flash memory cell and methods for programming and erasing

Algorithm for charge loss reduction and Vt distribution improvement

Methods for erasing and programming memory devices

Back-to-back NPN/PNP protection diodes

Controlling AC disturbance while programming

Flash memory cell and methods for programming and erasing

Flash memory unit and method of programming a flash memory device

Programming in memory devices using source bitline voltage bias

Strapping contact for charge protection

Select transistor using buried bit line from core

Multi-phase wordline erasing for flash memory

Using implanted poly-1 to improve charging protection in dual-poly process

Controlling AC disturbance while programming

Applying negative gate voltage to wordlines adjacent to wordline associated with read or verify to reduce adjacent wordline disturb

Thin oxide dummy tiling as charge protection

Selective application of word line bias to minimize fringe effects in electromagnetic fields during erase of nonvolatile memory

System and method for reducing process-induced charging

System and method for reducing process-induced charging

Selective application of word line bias to minimize fringe effects in electromagnetic fields during erase of nonvolatile memory

Room temperature drift suppression via soft program after erase

Back-to-back NPN/PNP protection diodes

Programming a memory device

Screening for reference cells in a memory

Multi-pass soft programming

Using thick spacer for bitline implant then remove

Deep bitline implant to avoid program disturb

ADVANCED MICRO DEVICES INC

Overerase correction method

Memory device and methods of using negative gate stress to correct over-erased memory cells

System for programming a non-volatile memory cell

Memory device and method using positive gate stress to recover overerased cell

Ramp source hot-hole programming for trap based non-volatile memory devices

Method of protecting a memory array from charge damage during fabrication

Method and structure for protecting NROM devices from induced charge damage during device fabrication

Methods for fabricating and planarizing dual poly scalable SONOS flash memory

Non-volatile memory cell and method of programming for improved data retention

Memory circuit for suppressing bit line current leakage

Pre-charge method for reading a non-volatile memory cell

Method and system for erasing a nitride memory device

CHUNG SUNG-YONG

Controlling AC disturbance while programming

Controlling AC disturbance while programming

ADVANCE MICRO DEVICES INC

Method for reading a non-volatile memory cell

DELTA ELECTRONICS INC

Resonant reset dual switch forward DC-to-DC converter

GU WEI

Method and system for dimming an offline LED driver

LINEAGE POWER CORP

Soft-transition controller of a synchronous converter

SPANSION L L C

System and method for erasing a memory cell

SINHA SHANKAR

Barrier region underlying source/drain regions for dual-bit memory devices

ZHENG WEI

Strapping contact for charge protection

KATHAWALA GULZAR A

Adjacent wordline disturb reduction using boron/indium implant

MARTIROSIAN ASHOT MELIK

System and method for reducing process-induced charging