Inventor

SILVESTRI PAUL A

US27 patents

⚠️ This page may combine multiple inventors who share the name “SILVESTRI PAUL A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SILVESTRI PAUL A

MICRON TECHNOLOGY INC

Delay locked loop monitor test mode

Semiconductor die assemblies and semiconductor devices including same

Semiconductor memory device capable of controlling clock cycle time for reduced power consumption

Delay locked loop with frequency control

Tunable delay circuit

Method and apparatus for latency specific duty cycle correction

Methods of fabricating semiconductor die assemblies

Integrated circuit apparatus, systems, and methods

Power supply voltage detection circuitry and methods for use of the same

Apparatus for latency specific duty cycle correction

Memory device having a delay locked loop with frequency control

Alignment of memory read data and clocking

Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods

Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods

Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication

Power supply voltage detection circuitry and methods for use of the same

Apparatus for latency specific duty cycle correction

Alignment of memory read data and clocking

Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods

Integrated circuit apparatus, systems, and methods

Method for controlling clock cycle time for reduced power consumption in a semiconductor memory device

SILVESTRI PAUL A

Integrated circuit apparatus, systems, and methods

Integrated circuit apparatus, systems, and methods

Tunable delay circuit

ENGLAND LUKE G

Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication

Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication

GROOTHUIS STEVEN K

Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods