Inventor
FUJIMORI ICHIRO
US36 patents
⚠️ This page may combine multiple inventors who share the name “FUJIMORI ICHIRO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
BROADCOM CORP
24 patentsUS9189043B2Nov 17, 2015
Apparatus and method for multipoint detection in power-over-ethernet detection mode
BROADCOM CORP76 citations98
US7936546B2May 3, 2011
Apparatus and method for classifying a powered device (PD) in a power source equipment (PSE) controller
BROADCOM CORP28 citations95
US7711967B2May 4, 2010
Apparatus and method for multi-point detection in power-over ethernet detection mode
BROADCOM CORP27 citations95
US7863871B2Jan 4, 2011
Apparatus and method for monitoring for a maintain power signature (MPS) of a powered device (PD) in a power source equipment (PSE) controller
BROADCOM CORP9 citations92
US7623600B2Nov 24, 2009
High speed receive equalizer architecture
BROADCOM CORP22 citations92
US7012559B1Mar 14, 2006
Hierarchical parallel pipelined operation of analog and digital circuits
BROADCOM CORP26 citations92
US6982583B2Jan 3, 2006
Current-controlled CMOS circuit using higher voltage supply in low voltage CMOS process
BROADCOM CORP35 citations92
US6911855B2Jun 28, 2005
Current-controlled CMOS circuit using higher voltage supply in low voltage CMOS process
BROADCOM CORP40 citations92
US6897697B2May 24, 2005
Current-controlled CMOS circuit using higher voltage supply in low voltage CMOS process
BROADCOM CORP36 citations92
US7974337B2Jul 5, 2011
High speed receive equalizer architecture
BROADCOM CORP14 citations84
US7496133B2Feb 24, 2009
Multi-rate on-chip OCN filter for a transceiver system
BROADCOM CORP11 citations84
US7206366B2Apr 17, 2007
System and method for programmably adjusting gain and frequency response in a 10-GigaBit ethernet/fibre channel system
BROADCOM CORP11 citations84
US8886840B2Nov 11, 2014
System and method for implementing a single chip having a multiple sub-layer PHY
BROADCOM CORP10 citations81
US7460589B2Dec 2, 2008
Eye monitoring and reconstruction using CDR and sub-sampling ADC
BROADCOM CORP15 citations77
US6995431B2Feb 7, 2006
System and method to reduce noise in a substrate
BROADCOM CORP4 citations74
US6909332B2Jun 21, 2005
System and method for tuning output drivers using voltage controlled oscillator capacitor settings
BROADCOM CORP7 citations74
US7733998B2Jun 8, 2010
System and method for programmably adjusting gain and frequency response in a 10-gigabit Ethernet/fibre channel system
BROADCOM CORP1 citations63
US6870228B2Mar 22, 2005
System and method to reduce noise in a substrate
BROADCOM CORP1 citations63
US6844226B2Jan 18, 2005
System and method to reduce noise in a substrate
BROADCOM CORP2 citations63
US7672340B2Mar 2, 2010
Built-in-self test for high-speed serial bit stream multiplexing and demultiplexing chip set
BROADCOM CORP3 citations62
US7781841B2Aug 24, 2010
System and method to reduce noise in a substrate
BROADCOM CORP0 citations52
US7449964B2Nov 11, 2008
System and method for tuning output drivers using voltage controlled oscillator capacitor settings
BROADCOM CORP1 citations52
US7361540B2Apr 22, 2008
Method of reducing noise disturbing a signal in an electronic device
BROADCOM CORP0 citations52
US8866552B2Oct 21, 2014
Current-mode line driver
BROADCOM CORP0 citations48
FUJIMORI ICHIRO
3 patentsUS8090047B2Jan 3, 2012
System and method for programmably adjusting gain and frequency response in a 10-gigabit ethernet/fibre channel system
FUJIMORI ICHIRO5 citations72
US8473640B2Jun 25, 2013
System and method for implementing a single chip having a multiple sub-layer PHY
FUJIMORI ICHIRO1 citations58
US8230114B2Jul 24, 2012
System and method for implementing a single chip having a multiple sub-layer PHY
FUJIMORI ICHIRO2 citations58