Inventor
KITAI NAOKI
JP19 patents
⚠️ This page may combine multiple inventors who share the name “KITAI NAOKI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
RENESAS ELECTRONICS CORP
7 patentsUS7964484B2Jun 21, 2011
Semiconductor integrated circuit device with reduced leakage current
RENESAS ELECTRONICS CORP14 citations92
US8797791B2Aug 5, 2014
Semiconductor integrated circuit device with reduced leakage current
RENESAS ELECTRONICS CORP7 citations84
US7907435B2Mar 15, 2011
Semiconductor device
RENESAS ELECTRONICS CORP9 citations84
US8031511B2Oct 4, 2011
Semiconductor device
RENESAS ELECTRONICS CORP6 citations74
US9530485B2Dec 27, 2016
Semiconductor integrated circuit device with reduced leakage current
RENESAS ELECTRONICS CORP1 citations63
US9111636B2Aug 18, 2015
Semiconductor integrated circuit device with reduced leakage current
RENESAS ELECTRONICS CORP2 citations63
US7907442B2Mar 15, 2011
Semiconductor integrated circuit
RENESAS ELECTRONICS CORP5 citations63
HITACHI ULSI SYS CO LTD
4 patentsUS6998674B2Feb 14, 2006
Semiconductor integrated circuit device with reduced leakage current
HITACHI ULSI SYS CO LTD28 citations96
US6885057B2Apr 26, 2005
Semiconductor integrated circuit device with reduced leakage current
HITACHI ULSI SYS CO LTD12 citations92
US6977858B2Dec 20, 2005
Semiconductor device
HITACHI ULSI SYS CO LTD13 citations84
US7087942B2Aug 8, 2006
Semiconductor integrated circuit device with reduced leakage current
HITACHI ULSI SYS CO LTD9 citations82
RENESAS TECH CORP
4 patentsUS7569881B2Aug 4, 2009
Semiconductor integrated circuit device with reduced leakage current
RENESAS TECH CORP9 citations92
US7692943B2Apr 6, 2010
Semiconductor memory device layout comprising high impurity well tap areas for supplying well voltages to N wells and P wells
RENESAS TECH CORP8 citations84
US7388238B2Jun 17, 2008
Semiconductor integrated circuit device with reduced leakage current
RENESAS TECH CORP6 citations74
US7319603B2Jan 15, 2008
Semiconductor memory device layout comprising high impurity well tap areas for supplying well voltages to N wells and P wells
RENESAS TECH CORP2 citations63
OSADA KENICHI
3 patentsUS8437179B2May 7, 2013
Semiconductor integrated circuit device with reduced leakage current
OSADA KENICHI3 citations73
US8232589B2Jul 31, 2012
Semiconductor integrated circuit device with reduced leakage current
OSADA KENICHI1 citations62
US8125017B2Feb 28, 2012
Semiconductor integrated circuit device with reduced leakage current
OSADA KENICHI1 citations62