Inventor

NORMAN ROBERT

US106 patents

⚠️ This page may combine multiple inventors who share the name “NORMAN ROBERT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NORMAN ROBERT

UNITY SEMICONDUCTOR CORP

Preservation circuit and methods to maintain values representing data in one or more layers of memory

Field programmable gate arrays using resistivity sensitive memories

Preservation circuit and methods to maintain values representing data in one or more layers of memory

Storage controller for multiple configurations of vertical memory

Combined memories in integrated circuits

Buffering systems methods for accessing multiple layers of memory in integrated circuits

Method and system for accessing non-volatile memory

Emulation of a NAND memory system

Multiple-type memory

Integrated circuits and methods to compensate for defective memory in multiple layers of memory

Circuitry and method for indicating a memory

Field programmable gate arrays using resistivity sensitive memories

Buffering systems for accessing multiple layers of memory in integrated circuits

Planar third dimensional memory with multi-port access

Memory emulation using resistivity-sensitive memory

Serial memory interface

Enhanced functionality in a two-terminal memory array

Programmable logic device structure using third dimensional memory

ASIC including vertically stacked embedded non-flash re-writable non-volatile memory

Performing data operations using non-volatile third dimension memory

Securing data in memory device

Media player with non-volatile memory

Performing data operations using non-volatile third dimension memory

Non-volatile register having a memory element and register logic vertically configured on a substrate

Programmable logic device structure using third dimensional memory

Memory power management

Combined memories in integrated circuits

NORMAN ROBERT

Non-volatile dual port third dimensional memory

Non-volatile FIFO with third dimension memory

Multiple layers of memory implemented as different memory technology

Dual ported non volatile FIFO with third dimension memory

Integrated circuits and methods to compensate for defective non-volatile embedded memory in one or more layers of vertically stacked non-volatile embedded memory

Memory scrubbing in third dimension memory

Digital potentiometer using third dimensional memory

Third dimensional memory with compress engine

Write buffering systems for accessing multiple layers of memory in integrated circuits

Combined memories in integrated circuits

Disturb control circuits and methods to control memory disturbs among multiple layers of memory

Electronic device harness assembly

Buffering systems for accessing multiple layers of memory in integrated circuits

Integrated circuits using non volatile resistivity sensitive memory for emulation of embedded flash memory

Integrated circuits to control access to multiple layers of memory in a solid state drive

MICRON TECHNOLOGY INC

Flash memory system and method for monitoring the disturb effect on memory cell blocks due to high voltage conditions of other memory cell blocks

System and method which compares data preread from memory cells to data to be written to the cells

Flash memory system and method for monitoring the disturb effect on memory cell blocks due to high voltage conditions of other memory cell blocks

System and method which compares data preread from memory cells to data to be written to the cells

MICRON QUANTUM DEVICES INC

Flash memory system and method for monitoring the disturb effect on memory cell blocks due to high voltage conditions of other memory cell blocks

CORATOMIC

Heart pacer

CHEVALLIER CHRISTOPHE

Preservation circuit and methods to maintain values representing data in one or more layers of memory

III HOLDINGS 1 LLC

Buffering systems for accessing multiple layers of memory in integrated circuits