Inventor
SOLT YOSEF
IL24 patents
⚠️ This page may combine multiple inventors who share the name “SOLT YOSEF”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MARVELL ISRAEL MISL LTD
11 patentsUS7539915B1May 26, 2009
Integrated circuit testing using segmented scan chains
MARVELL ISRAEL MISL LTD37 citations92
US7949908B2May 24, 2011
Memory repair system and method
MARVELL ISRAEL MISL LTD13 citations89
US10031181B1Jul 24, 2018
Integrated circuit package receiving test pattern and corresponding signature pattern
MARVELL ISRAEL MISL LTD3 citations73
US7689793B1Mar 30, 2010
Buffer management architecture
MARVELL ISRAEL MISL LTD5 citations71
US9093127B1Jul 28, 2015
Method and apparatus for warming up integrated circuits
MARVELL ISRAEL MISL LTD2 citations62
US7984358B1Jul 19, 2011
Error-correction memory architecture for testing production errors
MARVELL ISRAEL MISL LTD1 citations62
US7886207B1Feb 8, 2011
Integrated circuit testing using segmented scan chains
MARVELL ISRAEL MISL LTD2 citations62
US7730341B1Jun 1, 2010
System and method for transitioning from a logical state to any other logical state by modifying a single state element
MARVELL ISRAEL MISL LTD2 citations62
US7478308B1Jan 13, 2009
Error-correction memory architecture for testing production
MARVELL ISRAEL MISL LTD3 citations62
US8615688B2Dec 24, 2013
Method and system for iteratively testing and repairing an array of memory cells
MARVELL ISRAEL MISL LTD3 citations59
US8051348B1Nov 1, 2011
Integrated circuit testing using segmented scan chains
MARVELL ISRAEL MISL LTD0 citations52
SOLT YOSEF
6 patentsUS8208326B1Jun 26, 2012
Method and apparatus for memory test
SOLT YOSEF20 citations87
US8572412B1Oct 29, 2013
Method and apparatus for warming up integrated circuits
SOLT YOSEF9 citations83
US8661223B1Feb 25, 2014
Buffer management architecture
SOLT YOSEF2 citations59
US8829898B1Sep 9, 2014
Method and apparatus for testing
SOLT YOSEF2 citations55
US8176291B1May 8, 2012
Buffer management architecture
SOLT YOSEF1 citations49
US8526255B1Sep 3, 2013
Method and apparatus for memory test
SOLT YOSEF0 citations47
MARVELL SEMICONDUCTOR ISRAEL
3 patentsUS7206988B1Apr 17, 2007
Error-correction memory architecture for testing production errors
MARVELL SEMICONDUCTOR ISRAEL23 citations92
US6988237B1Jan 17, 2006
Error-correction memory architecture for testing production errors
MARVELL SEMICONDUCTOR ISRAEL16 citations92
US6829245B1Dec 7, 2004
Head of line blocking
MARVELL SEMICONDUCTOR ISRAEL18 citations84