P

Inventor

GOPAL RAMA S

US9 patents
⚠️ This page may combine multiple inventors who share the name “GOPAL RAMA S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

3 patents
US9892056B2Feb 13, 2018

Multi-core shared page miss handler

INTEL CORP3 citations71
US9921968B2Mar 20, 2018

Multi-core shared page miss handler

INTEL CORP0 citations50
US9892059B2Feb 13, 2018

Multi-core shared page miss handler

INTEL CORP0 citations50

SAMSUNG ELECTRONICS CO LTD

3 patents
US10956155B2Mar 23, 2021

Memory load to load fusing

SAMSUNG ELECTRONICS CO LTD4 citations70
US10372452B2Aug 6, 2019

Memory load to load fusing

SAMSUNG ELECTRONICS CO LTD2 citations70
US10275217B2Apr 30, 2019

Memory load and arithmetic load unit (ALU) fusing

SAMSUNG ELECTRONICS CO LTD3 citations70

ADVANCED MICRO DEVICES INC

2 patents
US7251710B1Jul 31, 2007

Cache memory subsystem including a fixed latency R/W pipeline

ADVANCED MICRO DEVICES INC12 citations83
US7165167B2Jan 16, 2007

Load store unit with replay mechanism

ADVANCED MICRO DEVICES INC6 citations62

BRYANT CHRISTOPHER D

1 patent
US9921967B2Mar 20, 2018

Multi-core shared page miss handler

BRYANT CHRISTOPHER D0 citations48