Inventor
ABRAMSON DARREN L
US18 patents
⚠️ This page may combine multiple inventors who share the name “ABRAMSON DARREN L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
16 patentsUS5991304ANov 23, 1999
Method and apparatus for minimizing asynchronous transmit FIFO under-run and receive FIFO over-run conditions
INTEL CORP53 citations96
US7525986B2Apr 28, 2009
Starvation prevention scheme for a fixed priority PCI-Express arbiter with grant counters using arbitration pools
INTEL CORP49 citations95
US6131135AOct 10, 2000
Arbitration method for a system with two USB host controllers
INTEL CORP53 citations95
US7228366B2Jun 5, 2007
Method and apparatus for deterministic removal and reclamation of work items from an expansion bus schedule
INTEL CORP30 citations92
US6665756B2Dec 16, 2003
Bus interface unit for reflecting state information for a transfer request to a requesting device
INTEL CORP18 citations92
US6499077B1Dec 24, 2002
Bus interface unit for reflecting state information for a transfer request to a requesting device
INTEL CORP23 citations92
US6385671B1May 7, 2002
Method/apparatus for flushing DMA transmit packet in FIFO when self-ID code generated by counter after bus reset is different than FIFO message self-ID field
INTEL CORP35 citations92
US6192428B1Feb 20, 2001
Method/apparatus for dynamically changing FIFO draining priority through asynchronous or isochronous DMA engines in response to packet type and predetermined high watermark being reached
INTEL CORP53 citations92
US6134625AOct 17, 2000
Method and apparatus for providing arbitration between multiple data streams
INTEL CORP42 citations92
US7990999B2Aug 2, 2011
Starvation prevention scheme for a fixed priority PCE-express arbiter with grant counters using arbitration pools
INTEL CORP22 citations91
US6643716B2Nov 4, 2003
Method and apparatus for processing serial data using a single receive fifo
INTEL CORP16 citations81
US7502377B2Mar 10, 2009
PCI to PCI express protocol conversion
INTEL CORP2 citations62
US6529980B1Mar 4, 2003
Superposition of host bridge status onto an existing request/grant signaling protocol
INTEL CORP3 citations62
US8347015B2Jan 1, 2013
Power-optimized frame synchronization for multiple USB controllers with non-uniform frame rates
INTEL CORP2 citations60
US8386682B2Feb 26, 2013
Method, apparatus and system for maintaining transaction coherecy in a multiple data bus platform
INTEL CORP3 citations59
US6374321B2Apr 16, 2002
Mechanisms for converting address and data signals to interrupt message signals
INTEL CORP6 citations59