Inventor
GARNIER PHILIPPE
GB5 patents
⚠️ This page may combine multiple inventors who share the name “GARNIER PHILIPPE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ST MICROELECTRONICS CROLLES 2 SAS
3 patentsUS9412589B2Aug 9, 2016
Method for fabricating NMOS and PMOS transistors on a substrate of the SOI, in particular FDSOI, type and corresponding integrated circuit
ST MICROELECTRONICS CROLLES 2 SAS1 citations47
US10014308B2Jul 3, 2018
Electronic chip manufacturing method
ST MICROELECTRONICS CROLLES 2 SAS0 citations45
US9437498B2Sep 6, 2016
Method for the formation of different gate metal regions of MOS transistors
ST MICROELECTRONICS CROLLES 2 SAS0 citations40