Inventor

HUANG CHENG-I

TW37 patents

⚠️ This page may combine multiple inventors who share the name “HUANG CHENG-I”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HUANG CHENG-I

TAIWAN SEMICONDUCTOR MFG CO LTD

EDA tool and method for conflict detection during multi-patterning lithography

Integrated circuit, system for and method of forming an integrated circuit

EDA tool and method for conflict detection during multi-patterning lithography

Cell boundaries for self aligned multiple patterning abutments

RC extraction for single patterning spacer technique

Standard-cell layout structure with horn power and smart metal cut

Integrated circuit, system for and method of forming an integrated circuit

Semiconductor device

Integrated circuit, system for and method of forming an integrated circuit

Semiconductor device

Integrated circuit, system for and method of forming an integrated circuit

Standard-cell layout structure with horn power and smart metal cut

Semiconductor device and layout thereof

Standard-cell layout structure with horn power and smart metal cut

Standard-cell layout structure with horn power and smart metal cut

Pattern formation method using a photo mask for manufacturing a semiconductor device

Semiconductor device and layout thereof

Semiconductor device and layout thereof

Electromigration resistant semiconductor device

TAIWAN SEMICONDUCTOR MFG

Semiconductor device design method, system and computer program product

Multiple via connections using connectivity rings

Methods for optimizing conductor patterns for ECP and CMP in semiconductor processing

Pattern matching based parasitic extraction with pattern reuse

Streamlined parasitic modeling with common device profile

Multiple via connections using connectivity rings

Hybrid design rule for double patterning

Semiconductor device design method

FARADAY TECH CORP

Mux scan cell with delay circuit for reducing hold-time violations

I/O circuit placement method and semiconductor device

Memory test system for peak power reduction

Method for forming an electric device comprising power switches around a logic circuit and related apparatus

HEWLETT PACKARD DEVELOPMENT CO

Constructing images of users&#39; faces by stitching non-overlapping images

Constructing images of users&#39; faces by stitching non-overlapping images

HUANG CHENG-I

RC extraction for single patterning spacer technique

DYNAHZ TECHNOLOGIES CORP

Coaxial electrical connector with a switching function

YUH PING-HUNG

Semiconductor device design method, system and computer program product

TSAI YU-PIN

Wafer laser-making method and die fabricated using the same

Constructing images of users' faces by stitching non-overlapping images

Constructing images of users' faces by stitching non-overlapping images