Inventor

KO JAE-BUM

KR54 patents

⚠️ This page may combine multiple inventors who share the name “KO JAE-BUM”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KO JAE-BUM

SK HYNIX INC

Semiconductor apparatus and chip selecting method thereof

Stacked semiconductor apparatus and semiconductor system capable of inputting signals through various paths

3D semiconductor apparatus for initializing channels

Semiconductor chip, semiconductor integrated circuit including the semiconductor chip, semiconductor system including the semiconductor integrated circuit and method of driving the semiconductor system

Semiconductor memory device and method for operating the same

Semiconductor integraged circuit having compatible mode selection circuit

Integrated circuit including semiconductor memory devices having stack structure

Delay circuit and method for delaying signal

Memory device and memory system including the same

Semiconductor device for parallel bit test and test method thereof

Semiconductor apparatus

Semiconductor memory apparatus

Semiconductor integrated circuit

Semiconductor device

Decoding circuit

Stacked semiconductor apparatus for generating refresh signal

Multi-chip package

HYNIX SEMICONDUCTOR INC

Semiconductor memory device with reduced data access time

Analog delay locked loop having duty cycle correction circuit

Semiconductor memory device having optimum refresh cycle according to temperature variation

Analog delay locked loop with tracking analog-digital converter

Semiconductor memory device with optimum refresh cycle according to temperature variation

Semiconductor memory device

Semiconductor memory device having advanced tag block

Semiconductor memory device with efficient multiplexing of I/O pad in multi-chip package

Semiconductor memory device for high speed data access

Analog-to-digital converter

Semiconductor memory device for decreasing the total number of data transfer lines

Semiconductor memory device having tag block for reducing initialization time

Semiconductor memory device with uniform data access time

Semiconductor memory device for enhancing refresh operation in high speed data access

Semiconductor memory device for controlling cell block with state machine

Semiconductor memory device capable of accessing data in continuous burst mode regardless of location of accessed data

KO JAE BUM

Column command buffer and latency circuit including the same

Semiconductor integrated circuit

Semiconductor apparatus

Semiconductor integrated circuit

Semiconductor apparatus and memory system including the same

Command buffer circuit of semiconductor apparatus

Address delay circuit of semiconductor memory apparatus

Precharge signal generation circuit of semiconductor memory apparatus

Address delay circuit of semiconductor memory apparatus

External signal input circuit of semiconductor memory

Semiconductor apparatus

KO JAE-BUM

Semiconductor package including multiple chips and memory system having the same

Semiconductor integrated circuit and semiconductor system including the same

BYEON SANG JIN

Semiconductor apparatus

AHN JIN-HONG

Semiconductor memory device with reduced data access time

KIM SE-JUN

Semiconductor memory device with optimum refresh cycle according to temperature variation

HUR HWANG

Semiconductor memory device