Inventor
PAPWORTH PAUL A
US6 patents
Patents
6 patentsUS7375410B2May 20, 2008
Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof
IBM17 citations92
US7115965B2Oct 3, 2006
Vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness for low-substrate bias operation
IBM16 citations92
US7485537B2Feb 3, 2009
Method of fabricating a vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness
IBM12 citations83
US7691716B2Apr 6, 2010
Vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness for low-substrate bias operation
IBM10 citations82
US7911024B2Mar 22, 2011
Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof
IBM6 citations73
US7763518B2Jul 27, 2010
Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof
IBM4 citations62