Inventor

RAJAMANI KARTHICK

US118 patents

⚠️ This page may combine multiple inventors who share the name “RAJAMANI KARTHICK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RAJAMANI KARTHICK

IBM

Systems and methods for memory module power management

Method and system for providing performance estimations for a specified power budget

Performance conserving method for reducing power consumption in a server system

Using object relational extensions for mining association rules

Non-contact current-sensing and voltage-sensing clamp

Processing performance improvement using activity factor headroom

Weighted event counting system and method for processor performance measurements

Weighted event counting system and method for processor performance measurements

Management of core power state transition in a microprocessor

Dynamic adjustment of operational parameters to compensate for sensor based measurements of circuit degradation

Monitoring aging of silicon in an integrated circuit device

Managing aging of silicon in an integrated circuit device

Transparently increasing power savings in a power management environment

Stackable module for energy-efficient computing systems

System and method for measurement-based power and energy accounting for virtual machines

Accounting and enforcing non-process execution by container-based software transmitting data over a network

Unified management of power, performance, and thermals in computer systems

Priority-aware power capping for hierarchical power distribution networks

Management of core power state transition in a microprocessor

Enforcing power caps on computing devices with multiple power feeds

Power capping for power consumption devices with multiple power supplies

Data center power conversion efficiency management

Deterministic current based frequency optimization of processor chip

Deterministic current based frequency optimization of processor chip

Power management for multi-core processing systems

Associating energy consumption with a virtual machine

Oversubscribing branch circuits while lowering power distribution costs

Distributed power budgeting

System and method for controlling idle state exits to manage DI/DT issues

Tracking pipelined activity during off-core memory accesses to evaluate the impact of processor core frequency changes

Monitoring power usage for a storage system that includes a set of storage units and a set of storage sub-units

Multi-branch current/voltage sensor array

Asynchronous persistent stores for transactions

CARTER JOHN B

Dynamic voltage and frequency scaling (DVFS) control for simultaneous multi-threading (SMT) processors

Dynamically adjusting an operating state of a data processing system running under a power cap

Optimizing power consumption by tracking how program runtime performance metrics respond to changes in operating frequency

Scalable space-optimized and energy-efficient computing system

Instruction set architecture extensions for performing power versus performance tradeoffs

FLOYD MICHAEL S

Performing virtual and/or physical resource management for power management

Using power proxies combined with on-chip actuators to meet a defined power target

Processor power management

HANSON HEATHER L

Priority-based power capping in data processing systems

Priority-based power capping in data processing systems

EL-ESSAWY WAEL

Flexible current and voltage sensor

FELTER WESLEY MICHAEL

Performance conserving power consumption reduction in a server system

ARNDT RICHARD L

Allocation of energy budgets to individual partitions

ARNDT RICHARD LOUIS

Controlling depth and latency of exit of a virtual processor&#39;s idle state in a power management environment

GHIASI SORAYA

Managing processor power-performance states

EL-ESSAWY WAEL R

Data center power conversion efficiency management

NAYAR NARESH

Preserving a dedicated temporary allocation virtualization function in a power management environment

Controlling depth and latency of exit of a virtual processor's idle state in a power management environment