Inventor

CHO HEUNG-JAE

KR76 patents

⚠️ This page may combine multiple inventors who share the name “CHO HEUNG-JAE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHO HEUNG-JAE

HYNIX SEMICONDUCTOR INC

Method of manufacturing semiconductor devices with titanium aluminum nitride work function

Semiconductor device with vertical channel transistor and method for fabricating the same

Semiconductor device having a fin transistor and method for fabricating the same

Non-volatile memory device with conductive sidewall spacer and method for fabricating the same

CMOS of semiconductor device and method for manufacturing the same

CMOS of semiconductor device and method for manufacturing the same

Method for forming multiple gate oxide layers

Cmos of semiconductor device and method for manufacturing the same

Method for fabricating transistor with polymetal gate electrode

Method for fabricating semiconductor device by using radical oxidation

Semiconductor device and method for fabricating the same using damascene process

Semiconductor device and method for fabricating the same

Method of fabricating a dual polysilicon gate of a semiconductor device with a multi-plane channel

Semiconductor device with multiple gate dielectric layers and method for fabricating the same

Method of forming a metal gate in a semiconductor device using atomic layer deposition process

Nonvolatile memory device with multiple blocking layers and method of fabricating the same

Semiconductor device with gate stack structure

Method for fabricating semiconductor device with use of partial gate recessing process

Method of forming gates in semiconductor devices

Method for forming a gate for semiconductor devices

Semiconductor device having a fin transistor

Transistor including bulb-type recess channel and method for fabricating the same

Nonvolatile memory device with multiple blocking layers and method of fabricating the same

Method for fabricating semiconductor device with an intermediate stack structure

Method for forming barrier metal layer of bit line in semiconductor memory device

Method for manufacturing recess gate in a semiconductor device

Semiconductor device with bulb-type recessed channel and method for fabricating the same

Method for fabricating semiconductor device

Semiconductor device with gate structure and method for fabricating the semiconductor device

Method for fabricating a transistor having vertical channel

Method for manufacturing non-volatile memory device having charge trap layer

Method for fabricating semiconductor device

Method for manufacturing recess gate in a semiconductor device

Method for fabricating semiconductor devices having dual gate oxide layer

Method for fabricating semiconductor devices having dual gate oxide layers

SK HYNIX INC

Vertical channel transistor with self-aligned gate electrode and method for fabricating the same

Vertical channel type nonvolatile memory device and method for fabricating the same

Semiconductor device and method for fabricating the same

Semiconductor device with gate stack structure

Method for fabricating semiconductor device

Semiconductor device with vertical channel transistor and method for fabricating the same

Semiconductor device with buried bit line and method for fabricating the same

Semiconductor device with buried bit line and method for fabricating the same

HYUNDAI ELECTRONICS IND

Gate structure with high K dielectric

Method for making high K dielectric gate for semiconductor device

Method of forming gate electrode with polycide structure in semiconductor device

SUNG MIN-GYU

Semiconductor device with vertical channel transistor

Method for fabricating tungsten line and method for fabricating gate of semiconductor device using the same

CHO HEUNG-JAE

Vertical channel transistor with self-aligned gate electrode and method for fabricating the same

LIM KWAN-YONG

Semiconductor device with gate stack structure