Inventor
PUTHIYEDATH LEENA K
US20 patents
⚠️ This page may combine multiple inventors who share the name “PUTHIYEDATH LEENA K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
13 patentsUS7117521B2Oct 3, 2006
Method to measure the perceived quality of streaming media
INTEL CORP127 citations98
US7565492B2Jul 21, 2009
Method and apparatus for preventing software side channel attacks
INTEL CORP9 citations84
US7647616B2Jan 12, 2010
Method to measure the perceived quality of streaming media
INTEL CORP13 citations83
US10725919B2Jul 28, 2020
Processors having virtually clustered cores and cache slices
INTEL CORP1 citations71
US10725920B2Jul 28, 2020
Processors having virtually clustered cores and cache slices
INTEL CORP2 citations71
US10705960B2Jul 7, 2020
Processors having virtually clustered cores and cache slices
INTEL CORP2 citations71
US10802984B2Oct 13, 2020
Techniques for persistent memory virtualization
INTEL CORP3 citations67
US10210012B2Feb 19, 2019
Techniques for persistent memory virtualization
INTEL CORP2 citations67
US10657068B2May 19, 2020
Techniques for an all persistent memory file system
INTEL CORP1 citations62
US10073779B2Sep 11, 2018
Processors having virtually clustered cores and cache slices
INTEL CORP1 citations61
US10001953B2Jun 19, 2018
System for configuring partitions within non-volatile random access memory (NVRAM) as a replacement for traditional mass storage
INTEL CORP1 citations52
US9459683B2Oct 4, 2016
Techniques for entering a low power state
INTEL CORP0 citations48
US10564986B2Feb 18, 2020
Methods and apparatus to suspend and resume computing systems
INTEL CORP0 citations42
PUTHIYEDATH LEENA K
3 patentsUS9529708B2Dec 27, 2016
Apparatus for configuring partitions within phase change memory of tablet computer with integrated memory controller emulating mass storage to storage driver based on request from software
PUTHIYEDATH LEENA K14 citations82
US8122230B2Feb 21, 2012
Using a processor identification instruction to provide multi-level processor topology information
PUTHIYEDATH LEENA K1 citations46
US9958926B2May 1, 2018
Method and system for providing instant responses to sleep state transitions with non-volatile random access memory
PUTHIYEDATH LEENA K0 citations40