Inventor
PATTEN RICHARD
DE19 patents
⚠️ This page may combine multiple inventors who share the name “PATTEN RICHARD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
12 patentsUS10910347B2Feb 2, 2021
Method, apparatus and system to interconnect packaged integrated circuit dies
INTEL CORP10 citations84
US11955462B2Apr 9, 2024
Package stacking using chip to wafer bonding
INTEL CORP3 citations74
US11239199B2Feb 1, 2022
Package stacking using chip to wafer bonding
INTEL CORP2 citations73
US11735570B2Aug 22, 2023
Fan out packaging pop mechanical attach method
INTEL CORP2 citations72
US10396055B2Aug 27, 2019
Method, apparatus and system to interconnect packaged integrated circuit dies
INTEL CORP2 citations72
US10249598B2Apr 2, 2019
Integrated circuit package having wirebonded multi-die stack
INTEL CORP4 citations72
US9972601B2May 15, 2018
Integrated circuit package having wirebonded multi-die stack
INTEL CORP4 citations72
US9859255B1Jan 2, 2018
Electronic device package
INTEL CORP6 citations68
US12243856B2Mar 4, 2025
Fan out packaging pop mechanical attach method
INTEL CORP0 citations62
US11527507B2Dec 13, 2022
Microelectronic packages with high integration microelectronic dice stack
INTEL CORP0 citations62
US11424209B2Aug 23, 2022
Wafer level package structure with internal conductive layer
INTEL CORP0 citations62
US12237305B2Feb 25, 2025
Integrated circuit package having wirebonded multi-die stack
INTEL CORP0 citations61
INTEL IP CORP
7 patentsUS10209466B2Feb 19, 2019
Integrated circuit packages including an optical redistribution layer
INTEL IP CORP3 citations73
US10872881B2Dec 22, 2020
Microelectronic packages with high integration microelectronic dice stack
INTEL IP CORP3 citations72
US10622333B2Apr 14, 2020
Microelectronic packages with high integration microelectronic dice stack
INTEL IP CORP3 citations72
US10672731B2Jun 2, 2020
Wafer level package structure with internal conductive layer
INTEL IP CORP1 citations62
US10854590B2Dec 1, 2020
Semiconductor die package with more than one hanging die
INTEL IP CORP0 citations52
US10816742B2Oct 27, 2020
Integrated circuit packages including an optical redistribution layer
INTEL IP CORP0 citations52
US10411000B2Sep 10, 2019
Microelectronic package with illuminated backside exterior
INTEL IP CORP0 citations48