Inventor

ORENSTIEN DORON

IL19 patents

⚠️ This page may combine multiple inventors who share the name “ORENSTIEN DORON”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ORENSTIEN DORON

INTEL CORP

Distribution of processing activity across processing hardware based on power consumption considerations

Distribution of processing activity in a multiple core microprocessor

Low-power processor hint, such as from a PAUSE instruction

Deterministic power-estimation for thermal control

Power reduction for processor front-end by caching decoded instructions

Apparatus and method for data bus power control

Selective hardware lock disabling

Power reduction for processor front-end by caching decoded instructions

Method and apparatus for a double width load using a single width load port

Low-power processor hint, such as from a pause instruction

Power reduction for processor front-end by caching decoded instructions

Apparatus and method for address bus power control

Method and apparatus for communicating between integrated circuits in a low power mode

Instructions and logic to perform mask load and store operations as sequential or one-at-a-time operations after exceptions and for un-cacheable type memory

Instruction and logic for performing range detection

ORENSTIEN DORON

Mixing instructions with different register sizes

Vector mask memory access instructions to perform individual and sequential memory access operations if an exception occurs during a full width memory access operation

VALENTINE ROBERT

Compressed instruction format

ANDERSON CRISTINA

Permute operations with flexible zero control