Inventor
LUCE STEPHEN E
US53 patents
⚠️ This page may combine multiple inventors who share the name “LUCE STEPHEN E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
42 patentsUS5985762ANov 16, 1999
Method of forming a self-aligned copper diffusion barrier in vias
IBM284 citations99
US7781781B2Aug 24, 2010
CMOS imager array with recessed dielectric
IBM65 citations98
US6153043ANov 28, 2000
Elimination of photo-induced electrochemical dissolution in chemical mechanical polishing
IBM122 citations97
US5219788AJun 15, 1993
Bilayer metallization cap for photolithography
IBM425 citations97
US7335577B2Feb 26, 2008
Crack stop for low K dielectrics
IBM47 citations95
US7521798B2Apr 21, 2009
Stacked imager package
IBM13 citations93
US7361989B1Apr 22, 2008
Stacked imager package
IBM26 citations93
US7015150B2Mar 21, 2006
Exposed pore sealing post patterning
IBM42 citations93
US5384281AJan 24, 1995
Non-conformal and oxidizable etch stops for submicron features
IBM31 citations93
US5486267AJan 23, 1996
Method for applying photoresist
IBM24 citations92
US5480748AJan 2, 1996
Protection of aluminum metallization against chemical attack during photoresist development
IBM29 citations92
US7521336B2Apr 21, 2009
Crack stop for low K dielectrics
IBM22 citations91
US6251787B1Jun 26, 2001
Elimination of photo-induced electrochemical dissolution in chemical mechanical polishing
IBM38 citations91
US4944682AJul 31, 1990
Method of forming borderless contacts
IBM36 citations91
US6426557B1Jul 30, 2002
Self-aligned last-metal C4 interconnection layer for Cu technologies
IBM26 citations87
US10941036B2Mar 9, 2021
Method of manufacturing MEMS switches with reduced switching voltage
IBM2 citations84
US8921201B2Dec 30, 2014
Integrated semiconductor devices with amorphous silicon beam, methods of manufacture and design structure
IBM7 citations84
US7541679B2Jun 2, 2009
Exposed pore sealing post patterning
IBM5 citations74
US6762108B2Jul 13, 2004
Method of forming a metal-insulator-metal capacitor for dual damascene interconnect processing and the device so formed
IBM5 citations73
US6504203B2Jan 7, 2003
Method of forming a metal-insulator-metal capacitor for dual damascene interconnect processing and the device so formed
IBM12 citations73
US9059396B2Jun 16, 2015
Integrated semiconductor devices with single crystalline beam, methods of manufacture and design structure
IBM2 citations63
US7824961B2Nov 2, 2010
Stacked imager package
IBM3 citations63
US7183656B2Feb 27, 2007
Bilayer aluminum last metal for interconnects and wirebond pads
IBM4 citations63
US5521434AMay 28, 1996
Semiconductor chip and electronic module with integrated surface interconnects/components
IBM3 citations63
US7087997B2Aug 8, 2006
Copper to aluminum interlayer interconnect using stud and via liner
IBM4 citations61
US7037824B2May 2, 2006
Copper to aluminum interlayer interconnect using stud and via liner
IBM2 citations61
US10836632B2Nov 17, 2020
Method of manufacturing MEMS switches with reduced switching voltage
IBM0 citations52
US10745273B2Aug 18, 2020
Method of manufacturing a switch
IBM0 citations52
US10647569B2May 12, 2020
Methods of manufacture for MEMS switches with reduced switching voltage
IBM0 citations52
US10640373B2May 5, 2020
Methods of manufacturing for MEMS switches with reduced switching voltage
IBM0 citations52
US10017383B2Jul 10, 2018
Method of manufacturing MEMS switches with reduced switching voltage
IBM0 citations52
US9944518B2Apr 17, 2018
Method of manufacture MEMS switches with reduced voltage
IBM0 citations52
US9944517B2Apr 17, 2018
Method of manufacturing MEMS switches with reduced switching volume
IBM0 citations52
US9847415B2Dec 19, 2017
Field effect transistor and method of manufacture
IBM1 citations52
US9824834B2Nov 21, 2017
Method of manufacturing MEMS switches with reduced voltage
IBM0 citations52
US9718681B2Aug 1, 2017
Method of manufacturing a switch
IBM0 citations52
US9287075B2Mar 15, 2016
MEMS switches with reduced switching voltage and methods of manufacture
IBM0 citations52
US9172025B2Oct 27, 2015
Integrated semiconductor devices with single crystalline beam, methods of manufacture and design structure
IBM0 citations52
US9059131B2Jun 16, 2015
Charge breakdown avoidance for MIM elements in SOI base technology and method
IBM0 citations52
US9019049B2Apr 28, 2015
MEMS switches with reduced switching voltage and methods of manufacture
IBM0 citations52
US8689152B2Apr 1, 2014
Double-sided integrated circuit chips
IBM0 citations52
US8044764B2Oct 25, 2011
Resistor and design structure having resistor material length with sub-lithographic width
IBM0 citations52
LUCE STEPHEN E
2 patentsHAKEY MARK C
2 patentsHARAME DAVID L
1 patentBERNSTEIN KERRY
1 patentCLARK JR WILLIAM F
1 patentBOTULA ALAN B
1 patentShowing the top 50 of 53 patents by PatentIndex Score.