Inventor

SHAPIRA YANIV

IL28 patents

⚠️ This page may combine multiple inventors who share the name “SHAPIRA YANIV”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHAPIRA YANIV

AMAZON TECH INC

Securing interfaces of a compute node

Multiple reset types in a system

Efficient memory management in multi-tenant virtualized environment

Clock generation with non-integer clock dividing ratio

Uniform memory access architecture

Hardware controller supporting memory page migration

Uniform memory access architecture

Hardware handling memory write request during memory data migration

Debugging a computing device

Address remapping for efficient use of distributed memory

Non-coherent and coherent connections in a multi-chip system

Low latency interrupt with existence of interrupt moderation

Flexible redundant array of independent disks (RAID) computation device

Configurable routing in a multi-chip system

Data transfer using point-to-point interconnect

Distributed digital ring oscillators in a digital system

Traffic separation in a multi-chip system

Address decoder for a multi-chip system

Flexible redundant array of independent disks (RAID) computation device

Clock generation with non-integer clock dividing ratio

Address remapping for efficient use of distributed memory

Dynamic processor core frequency adjustment

TELECOM ITALIA SPA

Apparatus for and method of multiple parallel string searching

Virtual private network mechanism incorporating security association processor

MOTOROLA INC

Memory system ensuring coherency for memory buffers in a data communication system

SHAPIRA YANIV

Method and apparatus for controlling data transfer in a serial-ATA system

ANNAPURNA LABS LTD

Flexible redundant array of independent disks (RAID) computation device

BSHARA SAID

Low latency interrupt with existence of interrupt moderation