Inventor
CRISS KJERSTEN E
US9 patents
Patents
9 patentsUS9817714B2Nov 14, 2017
Memory device on-die error checking and correcting code
INTEL CORP24 citations93
US11010304B2May 18, 2021
Memory with reduced exposure to manufacturing related data corruption errors
INTEL CORP9 citations85
US10572343B2Feb 25, 2020
Targeted aliasing single error correction (SEC) code
INTEL CORP10 citations83
US12235720B2Feb 25, 2025
Adaptive error correction to improve system memory reliability, availability, and serviceability (RAS)
INTEL CORP3 citations73
US11601137B2Mar 7, 2023
ECC memory chip encoder and decoder
INTEL CORP2 citations71
US10459809B2Oct 29, 2019
Stacked memory chip device with enhanced data protection capability
INTEL CORP1 citations61
US12360847B2Jul 15, 2025
Adaptive internal error scrubbing and error handling
INTEL CORP1 citations60
US12081234B2Sep 3, 2024
ECC memory chip encoder and decoder
INTEL CORP0 citations60
US10606690B2Mar 31, 2020
Memory controller error checking process using internal memory device codes
INTEL CORP1 citations60