P

Inventor

WAGH MAHESH

US107 patents
⚠️ This page may combine multiple inventors who share the name “WAGH MAHESH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

29 patents
US7783819B2Aug 24, 2010

Integrating non-peripheral component interconnect (PCI) resources into a personal computer system

INTEL CORP29 citations96
US7949794B2May 24, 2011

PCI express enhancements and extensions

INTEL CORP41 citations95
US10552253B2Feb 4, 2020

Multichip package link error detection

INTEL CORP15 citations94
US10552357B2Feb 4, 2020

Multichip package link

INTEL CORP14 citations93
US8924620B2Dec 30, 2014

Providing a consolidated sideband communication channel between devices

INTEL CORP25 citations93
US11245604B2Feb 8, 2022

Techniques to support multiple interconnect protocols for a common set of interconnect connectors

INTEL CORP3 citations92
US8010731B2Aug 30, 2011

Integrating non-peripheral component interconnect (PCI) resource into a personal computer system

INTEL CORP23 citations92
US7930566B2Apr 19, 2011

PCI express enhancements and extensions

INTEL CORP13 citations92
US7899943B2Mar 1, 2011

PCI express enhancements and extensions

INTEL CORP16 citations92
US9710406B2Jul 18, 2017

Data transmission using PCIe protocol via USB port

INTEL CORP15 citations90
US10152446B2Dec 11, 2018

Link-physical layer interface adapter

INTEL CORP10 citations84
US9535838B2Jan 3, 2017

Atomic operations in PCI express

INTEL CORP2 citations84
US9390046B2Jul 12, 2016

Controlling a physical link of a first protocol using an extended capability structure of a second protocol

INTEL CORP10 citations84
US9262360B2Feb 16, 2016

Architected protocol for changing link operating mode

INTEL CORP11 citations84
US9223735B2Dec 29, 2015

Providing a consolidated sideband communication channel between devices

INTEL CORP6 citations84
US9152596B2Oct 6, 2015

Architected protocol for changing link operating mode

INTEL CORP8 citations84
US9141577B2Sep 22, 2015

Optimized link training and management mechanism

INTEL CORP9 citations84
US9098415B2Aug 4, 2015

PCI express transaction descriptor

INTEL CORP4 citations84
US9032103B2May 12, 2015

Transaction re-ordering

INTEL CORP5 citations84
US9031064B2May 12, 2015

Providing a load/store communication protocol with a low power physical unit

INTEL CORP8 citations84
US9026682B2May 5, 2015

Prefectching in PCI express

INTEL CORP5 citations84
US8737390B2May 27, 2014

Providing a load/store communication protocol with a low power physical unit

INTEL CORP10 citations84
US8638783B2Jan 28, 2014

Optimized link training and management mechanism

INTEL CORP12 citations84
US8850247B2Sep 30, 2014

Power management for a system on a chip (SoC)

INTEL CORP4 citations83
US10606785B2Mar 31, 2020

Flex bus protocol negotiation and enabling sequence

INTEL CORP10 citations82
US10191877B2Jan 29, 2019

Architecture for software defined interconnect switch

INTEL CORP8 citations82
US10073808B2Sep 11, 2018

Multichip package link

INTEL CORP11 citations82
US9946676B2Apr 17, 2018

Multichip package link

INTEL CORP8 citations82
US9692402B2Jun 27, 2017

Method, apparatus, system for centering in a high performance interconnect

INTEL CORP10 citations82

AJANOVIC JASMIN

9 patents

WAGH MAHESH

6 patents

RANGANATHAN SRIDHARAN

2 patents

HARRIMAN DAVID J

1 patent

HAN WOOJONG

1 patent

FANG ZHEN

1 patent

PETHE AKSHAY G

1 patent

Showing the top 50 of 107 patents by PatentIndex Score.