P

Inventor

YOU WEN-CHUN

TW35 patents
⚠️ This page may combine multiple inventors who share the name “YOU WEN-CHUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TAIWAN SEMICONDUCTOR MFG CO LTD

33 patents
US9502466B1Nov 22, 2016

Dummy bottom electrode in interconnect to reduce CMP dishing

TAIWAN SEMICONDUCTOR MFG CO LTD81 citations98
US9172036B2Oct 27, 2015

Top electrode blocking layer for RRAM device

TAIWAN SEMICONDUCTOR MFG CO LTD29 citations98
US10008662B2Jun 26, 2018

Perpendicular magnetic tunneling junction (MTJ) for improved magnetoresistive random-access memory (MRAM) process

TAIWAN SEMICONDUCTOR MFG CO LTD53 citations94
US9425392B2Aug 23, 2016

RRAM cell structure with laterally offset BEVA/TEVA

TAIWAN SEMICONDUCTOR MFG CO LTD13 citations93
US10497861B2Dec 3, 2019

Manufacturing techniques and corresponding devices for magnetic tunnel junction devices

TAIWAN SEMICONDUCTOR MFG CO LTD4 citations84
US10043970B2Aug 7, 2018

Determining a characteristic of a monitored layer on an integrated chip

TAIWAN SEMICONDUCTOR MFG CO LTD7 citations84
US9985075B2May 29, 2018

Dummy bottom electrode in interconnect to reduce CMP dishing

TAIWAN SEMICONDUCTOR MFG CO LTD8 citations84
US9780302B2Oct 3, 2017

Top electrode for device structures in interconnect

TAIWAN SEMICONDUCTOR MFG CO LTD5 citations84
US9666790B2May 30, 2017

Manufacturing techniques and corresponding devices for magnetic tunnel junction devices

TAIWAN SEMICONDUCTOR MFG CO LTD12 citations84
US9112148B2Aug 18, 2015

RRAM cell structure with laterally offset BEVA/TEVA

TAIWAN SEMICONDUCTOR MFG CO LTD6 citations84
US9076522B2Jul 7, 2015

Memory cells breakdown protection

TAIWAN SEMICONDUCTOR MFG CO LTD12 citations84
US11075335B2Jul 27, 2021

Techniques for MRAM MTJ top electrode connection

TAIWAN SEMICONDUCTOR MFG CO LTD7 citations83
US11653572B2May 16, 2023

Manufacturing techniques and corresponding devices for magnetic tunnel junction devices

TAIWAN SEMICONDUCTOR MFG CO LTD2 citations73
US10937957B2Mar 2, 2021

Manufacturing techniques and corresponding devices for magnetic tunnel junction devices

TAIWAN SEMICONDUCTOR MFG CO LTD2 citations73
US10862029B2Dec 8, 2020

Top electrode for device structures in interconnect

TAIWAN SEMICONDUCTOR MFG CO LTD1 citations73
US10199575B2Feb 5, 2019

RRAM cell structure with laterally offset BEVA/TEVA

TAIWAN SEMICONDUCTOR MFG CO LTD1 citations73
US10134807B2Nov 20, 2018

Structure and formation method of integrated circuit structure

TAIWAN SEMICONDUCTOR MFG CO LTD3 citations73
US10878928B2Dec 29, 2020

One-time-programmable (OTP) implementation using magnetic junctions

TAIWAN SEMICONDUCTOR MFG CO LTD2 citations72
US11723292B2Aug 8, 2023

RRAM cell structure with laterally offset BEVA/TEVA

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations63
US9444045B2Sep 13, 2016

Top electrode for device structures in interconnect

TAIWAN SEMICONDUCTOR MFG CO LTD2 citations63
US12550619B2Feb 10, 2026

Techniques for MRAM MTJ top electrode connection

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US12426260B2Sep 23, 2025

Memory device with one-time programmable memory unit and method for fabricating the same

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US12426514B2Sep 23, 2025

Techniques for MRAM MTJ top electrode connection

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US12279437B2Apr 15, 2025

MRAM memory cell layout for minimizing bitcell area

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations61
US11800724B2Oct 24, 2023

MRAM memory cell layout for minimizing bitcell area

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations61
US11244983B2Feb 8, 2022

MRAM memory cell layout for minimizing bitcell area

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations61
US12476207B2Nov 18, 2025

Embedded memory device with reduced plasma-induced damage and methods of forming the same

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10868250B2Dec 15, 2020

Resistance variable memory structure and method of forming the same

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10700275B2Jun 30, 2020

RRAM cell structure with laterally offset BEVA/TEVA

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10510953B2Dec 17, 2019

Top electrode for device structures in interconnect

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10388868B2Aug 20, 2019

Resistance variable memory structure and method of forming the same

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10276790B2Apr 30, 2019

Top electrode for device structures in interconnect

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10868234B2Dec 15, 2020

Storage device having magnetic tunnel junction cells of different sizes, and method of forming storage device

TAIWAN SEMICONDUCTOR MFG CO LTD0 citations42

TAIWAN SEMICONDUCTOR MFG

2 patents