Inventor

BLAKE MICHAEL A

US61 patents

⚠️ This page may combine multiple inventors who share the name “BLAKE MICHAEL A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BLAKE MICHAEL A

IBM

SMP clusters with remote resource managers for distributing work to other clusters while reducing bus traffic to a minimum

Coherency management for a “switchless” distributed shared memory computer system

High speed remote storage controller

Clustered computer system with deadlock avoidance

Coherency management for a “switchless” distributed shared memory computer system

Bus protocol for a switchless distributed shared memory computer system

Method for deadlock avoidance in a cluster environment

Computer system deadlock request resolution using timed pulses

Method of resolving deadlocks between competing requests in a multiprocessor using global hang pulse logic

Memory management for a symmetric multiprocessor computer system

Cache coherency protocol for allowing parallel data fetches and eviction to the same addressable index

Dual clusters of fully connected integrated circuit multiprocessors with shared high-level cache

Dual clusters of fully connected integrated circuit multiprocessors with shared high-level cache

Hot cache line fairness arbitration in distributed modular SMP system

Hot cache line arbitration

Eliminate corrupted portions of cache during runtime

Eliminate corrupted portions of cache during runtime

Non-disruptive clearing of varying address ranges from cache

Non-disruptive clearing of varying address ranges from cache

Non-disruptive clearing of varying address ranges from cache

Multilevel cache eviction management

Topology for shared memory computer system

Castout handling in a distributed cache topology

Storing data in a system memory for a subsequent cache flush

System refresh in cache memory

Method, system and computer program product for preventing lockout and stalling conditions in a multi-node system with speculative memory fetching

Shadow pointer directory in an inclusive hierarchical cache

Horizontal cache persistence in a multi-compute node, symmetric multiprocessing computer

Efficient remote resource allocation within an SMP broadcast scope maintaining fairness between operation types

Modified central serialization of requests in multiprocessor systems

Eliminate corrupted portions of cache during runtime

Bitline deletion

Multilevel cache hierarchy for finding a cache line on a remote node

Dynamic cache correction mechanism to allow constant access to addressable index

EDRAM macro disablement in cache memory

EDRAM macro disablement in cache memory

Ownership tracking updates across multiple simultaneous operations

Ownership tracking updates across multiple simultaneous operations

Dynamic array masking

Operations interlock under dynamic relocation of storage

BLAKE MICHAEL A

Maintaining cache coherence in a multi-node, symmetric multiprocessing computer

Maintaining cache coherence in a multi-node, symmetric multiprocessing computer

Vehicle seat front floor latch and seat positioner assembly

Vehicle seat latch having striker compliance in transverse directions

PORTER GROUP LLC

Vehicle seat latch

Front latch assembly for vehicle seat cushion

(unassigned)

Hand-portable, light-weight cooker/heating device

BRONSON TIMOTHY C

Multilevel cache hierarchy for finding a cache line on a remote node

PAPAZOVA VESSELINA K

Cache coherency protocol with built in avoidance for conflicting responses

HAESKE ROBERT L

Vehicle seat rear floor latch and seat positioner assembly