Inventor

SPERBER ZEEV

IL216 patents

⚠️ This page may combine multiple inventors who share the name “SPERBER ZEEV”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SPERBER ZEEV

INTEL CORP

Systems, methods, and apparatuses for dot production operations

Systems, methods, and apparatuses for tile matrix multiplication and accumulation

Systems, methods, and apparatuses for tile diagonal

System and method of converting data formats and communicating between execution units

Memory system for multiple data types

Memory system for multiple data types

Systems, methods, and apparatus for matrix move

Systems, methods, and apparatuses for tile store

Systems, methods, and apparatus for tile configuration

Systems, methods, and apparatuses for tile store

Systems, methods, and apparatuses for tile load

Systems, methods, and apparatuses for zeroing a matrix

Systems, methods, and apparatus for matrix move

Systems, methods, and apparatuses for tile store

Systems, methods, and apparatuses for tile broadcast

Systems, methods, and apparatuses for matrix add, subtract, and multiply

Systems and methods to load a tile register pair

Systems, methods, and apparatus for tile configuration

Systems and methods to zero a tile register pair

Systems and methods for performing 16-bit floating-point matrix dot product instructions

Systems and methods for performing instructions to transpose rectangular tiles

Vector shuffle instructions operating on multiple lanes each having a plurality of data elements using a same set of per-lane control bits

Fusion of processor micro-operations

Z-compression mechanism

Texture engine state variable synchronizer

Mechanism for implementing Z-compression transparently

Apparatuses, methods, and systems for 8-bit floating-point matrix dot product instructions

Matrix transpose and multiply

Apparatuses, methods, and systems for instructions for 16-bit floating-point matrix dot product instructions

Systems and methods for performing 16-bit floating-point matrix dot product instructions

Systems, methods, and apparatuses for matrix operations

Systems and methods to store a tile register pair to memory

Systems and methods for computing dot products of nibbles in two tile operands

Systems, methods, and apparatuses for dot product operations

Systems and methods for performing 16-bit floating-point matrix dot product instructions

Systems and methods to load a tile register pair

Systems and methods for performing instructions to transpose rectangular tiles

Systems and methods for performing instructions to convert to 16-bit floating-point format

Using Fuzzy-Jbit location of floating-point multiply-accumulate results

Systems and methods to zero a tile register pair

Apparatuses, methods, and systems for transpose instructions of a matrix operations accelerator

Systems and methods to perform floating-point addition with selected rounding

Systems, apparatuses, and methods for fused multiply add

Multiply add functional unit capable of executing SCALE, ROUND, GETEXP, ROUND, GETMANT, REDUCE, RANGE and CLASS instructions

Method and apparatus to control current transients in a processor

Real time instruction trace processors, methods, and systems

SPERBER ZEEV

Vector shuffle instructions operating on multiple lanes each having a plurality of data elements using a same set of per-lane control bits

Vector shuffle instructions operating on multiple lanes each having a plurality of data elements using a common set of per-lane control bits

Gather using index array and finite state machine

GUERON SHAY

Method and apparatus for optimizing advanced encryption standard (AES) encryption and decryption in parallel modes of operation