Inventor
RUBANOVICH SIMON
IL102 patents
⚠️ This page may combine multiple inventors who share the name “RUBANOVICH SIMON”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
43 patentsUS11163565B2Nov 2, 2021
Systems, methods, and apparatuses for dot production operations
INTEL CORP24 citations98
US11086623B2Aug 10, 2021
Systems, methods, and apparatuses for tile matrix multiplication and accumulation
INTEL CORP32 citations98
US11200055B2Dec 14, 2021
Systems, methods, and apparatuses for matrix add, subtract, and multiply
INTEL CORP14 citations94
US11093247B2Aug 17, 2021
Systems and methods to load a tile register pair
INTEL CORP22 citations94
US11023235B2Jun 1, 2021
Systems and methods to zero a tile register pair
INTEL CORP22 citations94
US10963246B2Mar 30, 2021
Systems and methods for performing 16-bit floating-point matrix dot product instructions
INTEL CORP22 citations94
US10866786B2Dec 15, 2020
Systems and methods for performing instructions to transpose rectangular tiles
INTEL CORP27 citations94
US12020028B2Jun 25, 2024
Apparatuses, methods, and systems for 8-bit floating-point matrix dot product instructions
INTEL CORP7 citations86
US11972230B2Apr 30, 2024
Matrix transpose and multiply
INTEL CORP9 citations86
US11941395B2Mar 26, 2024
Apparatuses, methods, and systems for instructions for 16-bit floating-point matrix dot product instructions
INTEL CORP7 citations86
US11893389B2Feb 6, 2024
Systems and methods for performing 16-bit floating-point matrix dot product instructions
INTEL CORP7 citations86
US11816483B2Nov 14, 2023
Systems, methods, and apparatuses for matrix operations
INTEL CORP11 citations86
US11809869B2Nov 7, 2023
Systems and methods to store a tile register pair to memory
INTEL CORP12 citations86
US11789729B2Oct 17, 2023
Systems and methods for computing dot products of nibbles in two tile operands
INTEL CORP7 citations86
US11669326B2Jun 6, 2023
Systems, methods, and apparatuses for dot product operations
INTEL CORP15 citations86
US11614936B2Mar 28, 2023
Systems and methods for performing 16-bit floating-point matrix dot product instructions
INTEL CORP7 citations86
US11609762B2Mar 21, 2023
Systems and methods to load a tile register pair
INTEL CORP7 citations86
US11403071B2Aug 2, 2022
Systems and methods for performing instructions to transpose rectangular tiles
INTEL CORP7 citations86
US11372643B2Jun 28, 2022
Systems and methods for performing instructions to convert to 16-bit floating-point format
INTEL CORP7 citations86
US11016731B2May 25, 2021
Using Fuzzy-Jbit location of floating-point multiply-accumulate results
INTEL CORP15 citations86
US11645077B2May 9, 2023
Systems and methods to zero a tile register pair
INTEL CORP7 citations85
US10990397B2Apr 27, 2021
Apparatuses, methods, and systems for transpose instructions of a matrix operations accelerator
INTEL CORP14 citations85
US11175891B2Nov 16, 2021
Systems and methods to perform floating-point addition with selected rounding
INTEL CORP19 citations84
US11169802B2Nov 9, 2021
Systems, apparatuses, and methods for fused multiply add
INTEL CORP8 citations84
US9606770B2Mar 28, 2017
Multiply add functional unit capable of executing SCALE, ROUND, GETEXP, ROUND, GETMANT, REDUCE, RANGE and CLASS instructions
INTEL CORP9 citations84
US11714875B2Aug 1, 2023
Apparatuses, methods, and systems for instructions of a matrix operations accelerator
INTEL CORP8 citations83
US12260213B2Mar 25, 2025
Systems, methods, and apparatuses for matrix add, subtract, and multiply
INTEL CORP1 citations75
US12314717B2May 27, 2025
Systems, methods, and apparatuses for dot production operations
INTEL CORP0 citations73
US12147804B2Nov 19, 2024
Systems, methods, and apparatuses for tile matrix multiplication and accumulation
INTEL CORP1 citations73
US12124847B2Oct 22, 2024
Systems, methods, and apparatuses for tile transpose
INTEL CORP0 citations73
US12106100B2Oct 1, 2024
Systems, methods, and apparatuses for matrix operations
INTEL CORP0 citations73
US11544058B2Jan 3, 2023
Systems, apparatuses, and methods for fused multiply add
INTEL CORP2 citations73
US11526353B2Dec 13, 2022
Systems, apparatuses, and methods for fused multiply add
INTEL CORP2 citations73
US11526354B2Dec 13, 2022
Systems, apparatuses, and methods for fused multiply add
INTEL CORP2 citations73
US11507369B2Nov 22, 2022
Systems, apparatuses, and methods for fused multiply add
INTEL CORP2 citations73
US11366663B2Jun 21, 2022
Systems and methods for performing 16-bit floating-point vector dot product instructions
INTEL CORP3 citations73
US11036504B2Jun 15, 2021
Systems and methods for performing 16-bit floating-point vector dot product instructions
INTEL CORP2 citations73
US10275216B2Apr 30, 2019
Floating point scaling processors, methods, systems, and instructions
INTEL CORP1 citations73
US10228909B2Mar 12, 2019
Floating point scaling processors, methods, systems, and instructions
INTEL CORP1 citations73
US10203955B2Feb 12, 2019
Methods, apparatus, instructions and logic to provide vector packed tuple cross-comparison functionality
INTEL CORP4 citations73
US10073695B2Sep 11, 2018
Floating point round-off amount determination processors, methods, systems, and instructions
INTEL CORP3 citations73
US11681530B2Jun 20, 2023
Apparatuses, methods, and systems for hashing instructions
INTEL CORP1 citations72
US11567772B2Jan 31, 2023
Apparatuses, methods, and systems for hashing instructions
INTEL CORP1 citations72
GINZBURG BORIS
1 patentPINEIRO JOSE-ALEJANDRO
1 patentHAGOG MOSTAFA
1 patentGRADSTEIN AMIT
1 patentRUBANOVICH SIMON
1 patentANDERSON CHRISTINA S
1 patentOULD-AHMED-VALL ELMOUSTAPHA
1 patentShowing the top 50 of 102 patents by PatentIndex Score.