Inventor
PALA VIPINDAS
US45 patents
⚠️ This page may combine multiple inventors who share the name “PALA VIPINDAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CREE INC
23 patentsUS9768259B2Sep 19, 2017
Controlled ion implantation into silicon carbide using channeling and devices fabricated using controlled ion implantation into silicon carbide using channeling
CREE INC20 citations92
US9741842B2Aug 22, 2017
Vertical power transistor device
CREE INC6 citations84
US9484413B2Nov 1, 2016
Methods of forming buried junction devices in silicon carbide using ion implant channeling and silicon carbide devices including buried junctions
CREE INC9 citations84
US9331197B2May 3, 2016
Vertical power transistor device
CREE INC7 citations84
US9318597B2Apr 19, 2016
Layout configurations for integrating schottky contacts into a power transistor device
CREE INC15 citations84
US9306061B2Apr 5, 2016
Field effect transistor devices with protective regions
CREE INC7 citations84
US9142668B2Sep 22, 2015
Field effect transistor devices with buried well protection regions
CREE INC11 citations84
US11075264B2Jul 27, 2021
Super junction power semiconductor devices formed via ion implantation channeling techniques and related methods
CREE INC8 citations83
US10950719B2Mar 16, 2021
Seminconductor device with spreading layer
CREE INC2 citations73
USRE48380EJan 5, 2021
Vertical power transistor device
CREE INC1 citations73
US10784338B2Sep 22, 2020
Field effect transistor devices with buried well protection regions
CREE INC3 citations73
US10217824B2Feb 26, 2019
Controlled ion implantation into silicon carbide using channeling and devices fabricated using controlled ion implantation into silicon carbide using channeling
CREE INC3 citations73
US10134834B2Nov 20, 2018
Field effect transistor devices with buried well protection regions
CREE INC2 citations73
US9972677B2May 15, 2018
Methods of forming power semiconductor devices having superjunction structures with pillars having implanted sidewalls
CREE INC3 citations73
US9515199B2Dec 6, 2016
Power semiconductor devices having superjunction structures with implanted sidewalls
CREE INC3 citations73
US9425265B2Aug 23, 2016
Edge termination technique for high voltage power devices having a negative feature for an improved edge termination structure
CREE INC4 citations73
US9570585B2Feb 14, 2017
Field effect transistor devices with buried well protection regions
CREE INC1 citations62
US9111919B2Aug 18, 2015
Field effect device with enhanced gate dielectric structure
CREE INC3 citations62
US9064738B2Jun 23, 2015
Methods of forming junction termination extension edge terminations for high power semiconductor devices and related semiconductor devices
CREE INC2 citations62
US10868169B2Dec 15, 2020
Monolithically integrated vertical power transistor and bypass diode
CREE INC0 citations52
US10103230B2Oct 16, 2018
Methods of forming buried junction devices in silicon carbide using ion implant channeling and silicon carbide devices including buried junctions
CREE INC0 citations52
US9236433B2Jan 12, 2016
Semiconductor devices in SiC using vias through N-type substrate for backside contact to P-type layer
CREE INC1 citations52
US10600903B2Mar 24, 2020
Semiconductor device including a power transistor device and bypass diode
CREE INC0 citations42
MONOLITHIC POWER SYSTEMS INC
9 patentsUS11682722B2Jun 20, 2023
Vertical transistor structure with buried channel and resurf regions and method of manufacturing the same
MONOLITHIC POWER SYSTEMS INC2 citations73
US12283482B2Apr 22, 2025
Thin wafer process for improved crystal utilization of wide bandgap devices
MONOLITHIC POWER SYSTEMS INC0 citations62
US11869982B2Jan 9, 2024
Single sided channel mesa power junction field effect transistor
MONOLITHIC POWER SYSTEMS INC0 citations62
US11545585B2Jan 3, 2023
Single sided channel mesa power junction field effect transistor
MONOLITHIC POWER SYSTEMS INC0 citations62
US11521965B2Dec 6, 2022
Junction field effect transistor with integrated high voltage capacitor
MONOLITHIC POWER SYSTEMS INC0 citations62
US12525454B2Jan 13, 2026
Laser induced semiconductor wafer patterning
MONOLITHIC POWER SYSTEMS INC0 citations56
US11211484B2Dec 28, 2021
Vertical transistor structure with buried channel and resurf regions and method of manufacturing the same
MONOLITHIC POWER SYSTEMS INC0 citations53
US12206028B2Jan 21, 2025
Single sided channel mesa power junction field effect transistor
MONOLITHIC POWER SYSTEMS INC0 citations52
US12580561B2Mar 17, 2026
Switching slew rate control of cascode switch device and gate driver thereof
MONOLITHIC POWER SYSTEMS INC0 citations51
MAXIM INTEGRATED PRODUCTS
4 patentsUS11195909B2Dec 7, 2021
LDMOS transistors with breakdown voltage clamps
MAXIM INTEGRATED PRODUCTS2 citations73
US11705485B2Jul 18, 2023
LDMOS transistors with breakdown voltage clamps
MAXIM INTEGRATED PRODUCTS0 citations63
US11557588B2Jan 17, 2023
Multi-transistor device including first and second LDMOS transistors having respective drift regions separated in a thickness direction by a shared RESURF layer
MAXIM INTEGRATED PRODUCTS0 citations62
US10964694B2Mar 30, 2021
Multi-transistor device including first and second LDMOS transistors having respective drift regions separated in a thickness direction by a shared RESURF layer
MAXIM INTEGRATED PRODUCTS0 citations62
ALPHA & OMEGA SEMICONDUCTOR CAYMAN LTD
4 patentsUS11552078B2Jan 10, 2023
Silicon carbide MOSFET with source ballasting
ALPHA & OMEGA SEMICONDUCTOR CAYMAN LTD0 citations62
US11245016B2Feb 8, 2022
Silicon carbide trench semiconductor device
ALPHA & OMEGA SEMICONDUCTOR CAYMAN LTD1 citations62
US10818662B2Oct 27, 2020
Silicon carbide MOSFET with source ballasting
ALPHA & OMEGA SEMICONDUCTOR CAYMAN LTD1 citations62
US11069804B2Jul 20, 2021
Integration of HVLDMOS with shared isolation region
ALPHA & OMEGA SEMICONDUCTOR CAYMAN LTD0 citations52