Inventor
FERNSLER KIMBERLY M
US11 patents
Patents
11 patentsUS10037211B2Jul 31, 2018
Operation of a multi-slice processor with an expanded merge fetching queue
IBM15 citations83
US11755324B2Sep 12, 2023
Gather buffer management for unaligned and gather load operations
IBM2 citations72
US12411688B2Sep 9, 2025
Gather buffer management for unaligned and gather load operations
IBM0 citations62
US11687337B2Jun 27, 2023
Processor overriding of a false load-hit-store detection
IBM0 citations62
US10564978B2Feb 18, 2020
Operation of a multi-slice processor with an expanded merge fetching queue
IBM1 citations62
US11263151B2Mar 1, 2022
Dynamic translation lookaside buffer (TLB) invalidation using virtually tagged cache for load/store operations
IBM0 citations61
US11321088B2May 3, 2022
Tracking load and store instructions and addresses in an out-of-order processor
IBM0 citations60
US11314510B2Apr 26, 2022
Tracking load and store instructions and addresses in an out-of-order processor
IBM0 citations60
US11379241B2Jul 5, 2022
Handling oversize store to load forwarding in a processor
IBM0 citations51
US10884740B2Jan 5, 2021
Synchronized access to data in shared memory by resolving conflicting accesses by co-located hardware threads
IBM0 citations51
US9916245B2Mar 13, 2018
Accessing partial cachelines in a data cache
IBM0 citations41