Inventor

SINGIDI HARISH R

US53 patents

⚠️ This page may combine multiple inventors who share the name “SINGIDI HARISH R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SINGIDI HARISH R

MICRON TECHNOLOGY INC

Read disturb scan consolidation

Memory devices with read level calibration

Selective wordline scans based on a data state metric

Prioritization of error control operations at a memory sub-system

Selective sampling of a data unit during a program erase cycle based on error rate change patterns

Using a status indicator in a memory sub-system to detect an event

Garbage collection

Select gate maintenance in a memory sub-system

Read count scaling factor for data integrity scan

Read disturb scan consolidation

Erase cycle healing using a high voltage pulse

Read disturb scan consolidation

Dynamic over provisioning allocation for purposed blocks

Using a status indicator in a memory sub-system to detect an event

Scan frequency modulation based on memory density or block usage

Storing page write attributes

Methods of error-based read disturb mitigation and memory devices utilizing the same

Managing storage of multiple plane parity data in a memory sub-system

Selective relocation of data of a subset of a data block based on distribution of reliability statistics

Erase cycle healing using a high voltage pulse

Performing a program operation based on a high voltage pulse to securely erase data

Multi-page parity data storage in a memory device

Relocating data to low latency memory

Selective read disturb sampling

Prioritization of error control operations at a memory sub-system

Selective sampling of a data unit during a program erase cycle based on error rate change patterns

Selective sampling of a data unit based on program/erase execution time

Multi-page parity data storage in a memory device

Performing a program operation based on a high voltage pulse to securely erase data

Selective read disturb sampling

Dynamic over provisioning allocation for purposed blocks

Selective relocation of data of a subset of a data block based on distribution of reliability statistics

Scan frequency modulation based on memory density or block usage

Selective sampling of a data unit based on program/erase execution time

Relocating data to low latency memory

Read disturb scan consolidation

Selective relocation of data of a subset of a data block based on distribution of reliability statistics

Executing a refresh operation in a memory sub-system

Managing storage of multiple plane parity data in a memory sub-system

Read count scaling factor for data integrity scan

Regression-based calibration and scanning of data units

Selective wordline scans based on a data state metric

Adjusting a reliability scan threshold in a memory sub-system

Garbage collection

Storing page write attributes

Regression-based calibration and scanning of data units

Using a status indicator in a memory sub-system to detect an event

Garbage collection

WESTERN DIGITAL TECH INC

Modified distribution of memory device states

Modified distribution of memory device states