Inventor
AYGUN KEMAL
US103 patents
⚠️ This page may combine multiple inventors who share the name “AYGUN KEMAL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
41 patentsUS9515017B2Dec 6, 2016
Ground via clustering for crosstalk mitigation
INTEL CORP12 citations93
US8025531B1Sep 27, 2011
Shielded socket housing
INTEL CORP29 citations92
US7705447B2Apr 27, 2010
Input/output package architectures, and methods of using same
INTEL CORP19 citations92
US11621227B2Apr 4, 2023
Power delivery for embedded bridge die utilizing trench structures
INTEL CORP6 citations86
US11222848B2Jan 11, 2022
Power delivery for embedded bridge die utilizing trench structures
INTEL CORP6 citations86
US10950550B2Mar 16, 2021
Semiconductor package with through bridge die connections
INTEL CORP10 citations86
US11837549B2Dec 5, 2023
Power delivery for embedded bridge die utilizing trench structures
INTEL CORP3 citations84
US9971089B2May 15, 2018
Chip-to-chip interconnect with embedded electro-optical bridge structures
INTEL CORP6 citations84
US9922751B2Mar 20, 2018
Helically insulated twinax cable systems and methods
INTEL CORP9 citations84
US9806011B2Oct 31, 2017
Non-uniform substrate stackup
INTEL CORP7 citations84
US9542522B2Jan 10, 2017
Interconnect routing configurations and associated techniques
INTEL CORP6 citations84
US9230900B1Jan 5, 2016
Ground via clustering for crosstalk mitigation
INTEL CORP9 citations84
US10692847B2Jun 23, 2020
Inorganic interposer for multi-chip packaging
INTEL CORP7 citations80
US7989946B2Aug 2, 2011
Multimode signaling on decoupled input/output and power channels
INTEL CORP6 citations74
US7816779B2Oct 19, 2010
Multimode signaling on decoupled input/output and power channels
INTEL CORP5 citations74
US12062616B2Aug 13, 2024
Power delivery for embedded bridge die utilizing trench structures
INTEL CORP2 citations73
US11901280B2Feb 13, 2024
Ground via clustering for crosstalk mitigation
INTEL CORP2 citations73
US11817391B2Nov 14, 2023
Power delivery for embedded bridge die utilizing trench structures
INTEL CORP3 citations73
US11715889B2Aug 1, 2023
Slow wave structure for millimeter wave antennas
INTEL CORP2 citations73
US10748842B2Aug 18, 2020
Package substrates with magnetic build-up layers
INTEL CORP1 citations73
US10416378B2Sep 17, 2019
Chip-to-chip interconnect with embedded electro-optical bridge structures
INTEL CORP2 citations73
US10056528B1Aug 21, 2018
Interposer structures, semiconductor assembly and methods for forming interposer structures
INTEL CORP4 citations73
US10026682B2Jul 17, 2018
Ground via clustering for crosstalk mitigation
INTEL CORP2 citations73
US11291133B2Mar 29, 2022
Selective ground flood around reduced land pad on package base layer to enable high speed land grid array (LGA) socket
INTEL CORP2 citations72
US10784204B2Sep 22, 2020
Rlink—die to die channel interconnect configurations to improve signaling
INTEL CORP3 citations72
US10375832B2Aug 6, 2019
Method of forming an interference shield on a substrate
INTEL CORP2 citations72
US10103054B2Oct 16, 2018
Coupled vias for channel cross-talk reduction
INTEL CORP4 citations72
US11276635B2Mar 15, 2022
Horizontal pitch translation using embedded bridge dies
INTEL CORP2 citations71
US10510667B2Dec 17, 2019
Conductive coating for a microelectronics package
INTEL CORP4 citations70
US9780510B2Oct 3, 2017
Socket contact techniques and configurations
INTEL CORP3 citations70
US12482733B2Nov 25, 2025
Ground via clustering for crosstalk mitigation
INTEL CORP0 citations63
US11923308B2Mar 5, 2024
Die interconnect structures having bump field and ground plane
INTEL CORP0 citations63
US11742275B2Aug 29, 2023
Ground via clustering for crosstalk mitigation
INTEL CORP0 citations63
US11682613B2Jun 20, 2023
Package substrates with magnetic build-up layers
INTEL CORP0 citations63
US11387188B2Jul 12, 2022
High density interconnect structures configured for manufacturing and performance
INTEL CORP0 citations63
US11244890B2Feb 8, 2022
Ground via clustering for crosstalk mitigation
INTEL CORP0 citations63
US11222847B2Jan 11, 2022
Enabling long interconnect bridges
INTEL CORP0 citations63
US11081434B2Aug 3, 2021
Package substrates with magnetic build-up layers
INTEL CORP0 citations63
US10892225B2Jan 12, 2021
Die interconnect structures and methods
INTEL CORP1 citations63
US10283453B2May 7, 2019
Interconnect routing configurations and associated techniques
INTEL CORP1 citations63
US9232639B2Jan 5, 2016
Non-uniform substrate stackup
INTEL CORP2 citations63
QIAN ZHIGUO
2 patentsGANESAN SANKA
2 patentsZHANG ZHICHAO
2 patentsBRAUNISCH HENNING
1 patentSHIN JAEMIN
1 patentALTUNYURT NEVIN
1 patentShowing the top 50 of 103 patents by PatentIndex Score.