Inventor

GARA ALAN

US56 patents

⚠️ This page may combine multiple inventors who share the name “GARA ALAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GARA ALAN

IBM

Collective network for computer structures

Methods and apparatus using commutative error detection values for fault isolation in multiple node computers

Programmable stream prefetch with resource optimization

Re-utilizing partially failed resources as network resources

Combined group ECC protection and subgroup parity protection

Error recovery to enable error-free message transfer between nodes of a computer network

Bad data packet capture device

Managing power in a parallel computer

Multiprocessor system with multiple concurrent modes of execution

Embedding global barrier and collective in a torus network

Opcode counting for performance measurement

Collective network for computer structures

Opcode counting for performance measurement

Opcode counting for performance measurement

Dynamic hard error detection

Embedding global and collective in a torus network with message class map based tree path selection

Dynamic hard error detection

Combined group ECC protection and subgroup parity protection

Opcode counting for performance measurement

GARA ALAN

Method and apparatus of prefetching streams of varying prefetch depth

Cache directory lookup reader set encoding for partial cache line speculation support

State recovery and lockstep execution restart in a system with multiprocessor pairing

Scheduler for multiprocessor system switch with selective pairing

Multiprocessor switch with selective pairing

Using DMA for copying performance counter data to memory

Ordering of guarded and unguarded stores for no-sync I/O

Evict on write, a management strategy for a prefetch unit and/or first level cache in a multiprocessor system with speculative execution

BLUMRICH MATTHIAS A

Collective network for computer structures

Cache as point of coherence in multiprocessor system

Local rollback for fault-tolerance in parallel computing systems

Non-volatile memory for checkpoint storage

CHEN DONG

Optimizing TLB entries for mixed page size storage in contiguous memory

Optimizing TLB entries for mixed page size storage in contiguous memory

Extended write combining using a write continuation hint flag

Global synchronization of parallel processors using clock pulse width modulation

EICHENBERGER ALEXANDRE E

Checkpointing in speculative versioning caches

Insertion of operation-and-indicate instructions for optimized SIMD code

CHER CHEN-YONG

Reliability and performance of a system-on-a-chip by predictive wear-out based activation of functional components

Efficiency of static core turn-off in a system-on-a-chip with variation

BOYLE PETER

List based prefetch

List based prefetch

AHN DANIEL

Multiprocessor system with multiple concurrent modes of execution

Reader set encoding for directory of shared cache memory in multiprocessor system

ASAAD SAMEH

Multi-petascale highly efficient parallel supercomputer

GLOBALFOUNDRIES INC

Multi-petascale highly efficient parallel supercomputer

BHANOT GYAN V

Optimizing layout of an application on a massively parallel supercomputer

DAVIS KRISTAN D

Distributed performance counters

BELLOFATTO RALPH A

Reproducibility in a multiprocessor system

BOYLE PETER A

Method and apparatus of parallel computing with simultaneously operating stream prefetching and list prefetching engines

SAMSUNG ELECTRONICS CO LTD

Message split-aggregation for multi-stage electrical interconnection network