Inventor

YANG QINGYUN

US17 patents

⚠️ This page may combine multiple inventors who share the name “YANG QINGYUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YANG QINGYUN

IBM

Gate linewidth tailoring and critical dimension control for sub-100 nm devices using plasma etching

Method of making sub-lithographic features

Method to controllably form notched polysilicon gate structures

Gate patterning of nano-channel devices

Integration schemes for fabricating polysilicon gate MOSFET and high-K dielectric metal gate MOSFET

Method for uniform reactive ion etching of dual pre-doped polysilicon regions

Method to form gate conductor structures of dual doped polysilicon

Fabrication of notched gates by passivating partially etched gate sidewalls and then using an isotropic etch

TOKYO ELECTRON LTD

Oxygen-free plasma etching for contact etching of resistive random access memory

Plasma co-doping to reduce the forming voltage in resistive random access memory (ReRAM) devices

Methods for etching metal films using plasma processing

Process for patterning a magnetic tunnel junction

WU SONG

Method for resolution of a mixture of pinocembrin optical isomers, especially a pinocembrin racemate

Inclusion complexes of pinocembrin with cyclodextrin or its derivatives

ZHANG YING

Method of removing high-K dielectric layer on sidewalls of gate structure

CHAN KEVIN K

Method of replacement source/drain for 3D CMOS transistors

FULLER NICHOLAS C M

Gate patterning of nano-channel devices