Inventor

MCKEE WILLIAM R

US39 patents

⚠️ This page may combine multiple inventors who share the name “MCKEE WILLIAM R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MCKEE WILLIAM R

TEXAS INSTRUMENTS INC

Integrated circuit capacitor

Yield improvement of dual damascene fabrication through oxide filling

Method for fabricating an integrated circuit structure

Integrated circuit capacitor

Thermal neutron shielded integrated circuits

Dynamic memory storage capacitor having reduced gated diode leakage

Boundary cells for improving retention time in memory devices

Integrated circuit and method

Production of single crystal semiconductors

Photovoltaic solar arrays using silicon microparticles

Method for making channel stop structure for CMOS devices

Method for positioning sub-resolution assist features

Line-to-line reliability enhancement using a dielectric liner for a low dielectric constant interlevel and intralevel (or intermetal and intrametal) dielectric layer

Poly sidewall process to reduce gated diode leakage

Production of single crystal semiconductors

Device fabrication incorporating liquid assisted laser patterning of metallization

Process for high thermal stable contact formation in manufacturing sub-quarter-micron CMOS devices

Post-etch treatment of a semiconductor device

Method to eliminate gate filaments on field plate isolated devices

Fabrication process for semiconductor bodies

System for fabrication of semiconductor bodies

Method of fabricating and operating single polysilicon flash EEPROM with low positive programming and erasing voltage and small cell size

Single polysilicon flash EEPROM with low positive programming and erasing voltage and small cell size

Integrated circuit memory devices with high angle implant around top of trench to reduce gated diode leakage

System with meshed power and signal buses on cell array

Verifying a process margin of a mask pattern using intermediate stage models

System with meshed power and signal buses on cell array

In-situ doped rough polysilicon storage cell structure formed using gas phase nucleation

HITACHI LTD

System with meshed power and signal buses on cell array

System with meshed power and signal buses on cell array

System with meshed power and signal buses on cell array

System with meshed power and signal buses on cell array

System with meshed power and signal buses on cell array

System with meshed power and signal buses on cell array

System with meshed power and signal buses on cell array

HITACHI INC

System with meshed power and signal buses on cell array

System with meshed power and signal buses on cell array

MAXTOR CORP

Data recording system incorporating flaw detection circuitry

ANDERSON DIRK N

High angle implant around top of trench to reduce gated diode leakage