Inventor
CHERN GEENG-CHUAN MICHAEL
US4 patents
Patents
4 patentsUS7668013B2Feb 23, 2010
Method for erasing a flash memory cell or an array of such cells having improved erase coupling ratio
SILICON STORAGE TECH INC17 citations91
US6706592B2Mar 16, 2004
Self aligned method of forming a semiconductor array of non-volatile memory cells
SILICON STORAGE TECH INC38 citations90
US7974136B2Jul 5, 2011
Method for erasing a flash memory cell or an array of such cells having improved erase coupling ratio
SILICON STORAGE TECH INC2 citations61
US7701248B2Apr 20, 2010
Storage element for controlling a logic circuit, and a logic device having an array of such storage elements
SILICON STORAGE TECH INC0 citations39