Inventor
GOLES JOHN R
US11 patents
Patents
11 patentsUS10146711B2Dec 4, 2018
Techniques to access or operate a dual in-line memory module via multiple data channels
INTEL CORP14 citations84
US10496309B2Dec 3, 2019
Input/output (I/O) loopback function for I/O signaling testing
INTEL CORP5 citations82
US10592445B2Mar 17, 2020
Techniques to access or operate a dual in-line memory module via multiple data channels
INTEL CORP2 citations73
US12367943B2Jul 22, 2025
Reference voltage adjustment per path for high speed memory signaling
INTEL CORP2 citations72
US10891243B2Jan 12, 2021
Memory bus MR register programming process
INTEL CORP4 citations72
US10380043B2Aug 13, 2019
Memory bus MR register programming process
INTEL CORP2 citations72
US11662926B2May 30, 2023
Input/output (I/O) loopback function for I/O signaling testing
INTEL CORP0 citations61
US10969979B2Apr 6, 2021
Input/output (I/O) loopback function for I/O signaling testing
INTEL CORP0 citations61
US12204751B2Jan 21, 2025
Reference voltage training per path for high speed memory signaling
INTEL CORP0 citations56
US12332812B2Jun 17, 2025
Memory device manageability bus
INTEL CORP0 citations51
US12217787B2Feb 4, 2025
Apparatus, system and method to detect and improve an input clock performance of a memory device
INTEL CORP0 citations44