Inventor
NAKANISHI TOSAKU
US28 patents
⚠️ This page may combine multiple inventors who share the name “NAKANISHI TOSAKU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SHARP KK
16 patentsUS4623985ANov 18, 1986
Language translator with circuitry for detecting and holding words not stored in dictionary ROM
SHARP KK27 citations92
US4443856AApr 17, 1984
Electronic translator for modifying and speaking out sentence
SHARP KK27 citations92
US4383306AMay 10, 1983
Electronic translator for indicating the kind of translated tongue
SHARP KK30 citations92
US4733368AMar 22, 1988
Electronic device for bidirectional translation
SHARP KK17 citations82
US4417319ANov 22, 1983
Electronic translator for providing additional sentences formed by directly-translated words
SHARP KK24 citations82
US4597055AJun 24, 1986
Electronic sentence translator
SHARP KK25 citations81
US4593356AJun 3, 1986
Electronic translator for specifying a sentence with at least one key word
SHARP KK23 citations81
US4225890ASep 30, 1980
Magnetic tape recorder having a tape drive controller implemented with a digital processor chip
SHARP KK25 citations78
US4613944ASep 23, 1986
Electronic translator having removable data memory and controller both connectable to any one of terminals
SHARP KK11 citations74
US4493050AJan 8, 1985
Electronic translator having removable voice data memory connectable to any one of terminals
SHARP KK7 citations74
US4393462AJul 12, 1983
Electronic translator with means for pronouncing input words and translated words
SHARP KK19 citations74
US4020467AApr 26, 1977
Miniaturized key entry and translation circuitry arrangement for a data processing unit
SHARP KK10 citations74
US4737782AApr 12, 1988
Liquid crystal display drive circuit with variable sequence of backplate scanning and variable duty factor
SHARP KK16 citations71
US4989177AJan 29, 1991
Attachment connectable to electronic translator
SHARP KK5 citations63
US4599613AJul 8, 1986
Display drive without initial disturbed state of display
SHARP KK1 citations50
US4595998AJun 17, 1986
Electronic translator which accesses the memory in either a forward or reverse sequence
SHARP KK0 citations41
INTEL CORP
11 patentsUS6631474B1Oct 7, 2003
System to coordinate switching between first and second processors and to coordinate cache coherency between first and second processors during switching
INTEL CORP251 citations98
US6470422B2Oct 22, 2002
Buffer memory management in a system having multiple execution entities
INTEL CORP171 citations98
US6349363B2Feb 19, 2002
Multi-section cache with different attributes for each section
INTEL CORP295 citations98
US5560001ASep 24, 1996
Method of operating a processor at a reduced speed
INTEL CORP45 citations95
US5473767ADec 5, 1995
Method and apparatus for asynchronously stopping the clock in a processor
INTEL CORP34 citations95
US5560002ASep 24, 1996
Method of testing a microprocessor by masking of an internal clock signal
INTEL CORP26 citations92
US5469544ANov 21, 1995
Central processing unit address pipelining
INTEL CORP32 citations92
US6014751AJan 11, 2000
Method and apparatus for maintaining cache coherency in an integrated circuit operating in a low power state
INTEL CORP48 citations89
US6735659B1May 11, 2004
Method and apparatus for serial communication with a co-processor
INTEL CORP9 citations73
US5918043AJun 29, 1999
Method and apparatus for asynchronously stopping the clock in a processor
INTEL CORP10 citations73
US6016551AJan 18, 2000
Method and apparatus for masking and unmasking a clock signal in an integrated circuit
INTEL CORP3 citations63