Inventor

HOUGHTON RUSSELL J

US58 patents

⚠️ This page may combine multiple inventors who share the name “HOUGHTON RUSSELL J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HOUGHTON RUSSELL J

IBM

Low-power band-gap reference and temperature sensor circuit

High impedance antifuse

Low-power band-gap reference and temperature sensor circuit

Method for novel SOI DRAM BICMOS NPN

Methods and apparatus for blowing and sensing antifuses

Impedance control using fuses

Capacitively coupled sensing apparatus and method for cross point magnetic random access memory devices

Method and apparatus for semiconductor integrated circuit testing and burn-in

Low-power DC voltage generator system

Structures and methods of anti-fuse formation in SOI

Antifuse latch device with controlled current programming and variable trip point

Sense amplifier with overdrive and regulated bitline voltage

Low-power DC voltage generator system

High frequency valid data strobe

Very low power logic circuit family with enhanced noise immunity

Three device BICMOS gain cell

Multi-level storage gain cell with stepline

Electrically programmable antifuses and methods for forming the same

Method of forming connection and anti-fuse in layered substrate such as SOI

Constant impedance driver for high speed interface

Method for forming mixed high voltage (HV/LV) transistors for CMOS devices using controlled gate depletion

Bias circuit for series connected decoupling capacitors

Control of hysteresis characteristic within a CMOS differential receiver

Single-ended semiconductor receiver with built in threshold voltage difference

Bias circuit for series connected decoupling capacitors

Gain memory cell with diode

Mixed threshold voltage CMOS logic device and method of manufacture therefor

Impedance control using fuses

Clocking circuit with increasing delay as supply voltage VDD

Off-chip driver with voltage regulated predrive

Boosted drive system for master/local word line memory architecture

Integrated power solution for system on chip applications

Sense amplifier threshold compensation

Apparatus and method for performing a defect leakage screen test for memory devices

Logic SOI structure, process and application for vertical bipolar transistor

Method for forming a voltage programming element

Weak inversion NMOS regulator with boosted gate

Structures and methods of anti-fuse formation in SOI

Structures and methods of anti-fuse formation in SOI

DRAM word line voltage control to insure full cell writeback level

Module with low leakage driver circuits and method of operation

Method for forming an integrated trench capacitor

Stable voltage reference circuit with high Vt devices

Array driver

Sense latch

Compensated-current mirror off-chip driver

Defect leakage screen system

INFINEON TECHNOLOGIES AG

Wordline on and off voltage compensation circuit based on the array device threshold voltage

Method to improve charge pump reliability, efficiency and size

SIEMENS AG

Current source