Inventor

SHICHIJO HISASHI

US24 patents

⚠️ This page may combine multiple inventors who share the name “SHICHIJO HISASHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHICHIJO HISASHI

TEXAS INSTRUMENTS INC

Integrated CMOS structure for gate-controlled buried photodiode

Method of making planarized heterostructures using selective epitaxial growth

dRAM cell and method

Epitaxial layer on a heterointerface

Method of forming an epitaxial layer on a heterointerface

Device and method of low voltage SCR protection for high voltage failsafe ESD applications

Integrated bipolar junction transistor for mixed signal circuits

Multiple substrate bias random access memory device

Programmable resistor and an array of the same

Integrated structure for reduced leakage and improved fill-factor in CMOS pixel

Heteroepitaxial selective-area growth through insulator windows

Device and method of low voltage SCR protection for high voltage failsafe ESD applications

Metal insulator metal (MIM) capacitor fabrication with sidewall spacers and aluminum cap (ALCAP) top electrode

Complementary heterostructure field effect transistors

Vertical one-transistor DRAM with enhanced capacitance and process for fabricating

Method for fabricating a multiple well structure for providing multiple substrate bias for DRAM device formed therein

CMOS photodiode having reduced dark current and improved light sensitivity and responsivity

CMOS photodiode having reduced dark current and improved light sensitivity and responsivity

Contactless tite RAM

Method of making complementary heterostructure field effect transistors

Process and temperature insensitive flicker noise monitor circuit

Process and temperature insensitive flicker noise monitor circuit

Matched analog CMOS transistors with extension wells

BENAISSA KAMEL

DEMOS transistors with STI and compensated well in drain