Inventor
WARD KENNETH LUNDY
US6 patents
Patents
6 patentsUS7409589B2Aug 5, 2008
Method and apparatus for reducing number of cycles required to checkpoint instructions in a multi-threaded processor
IBM20 citations89
US7865758B2Jan 4, 2011
Fault tolerant time synchronization mechanism in a scaleable multi-processor computer
IBM6 citations72
US7487377B2Feb 3, 2009
Method and apparatus for fault tolerant time synchronization mechanism in a scaleable multi-processor computer
IBM7 citations72
US5805836ASep 8, 1998
Method and apparatus for equalizing grants of a data bus to primary and secondary devices
IBM8 citations65
US7870406B2Jan 11, 2011
Method and apparatus for frequency independent processor utilization recording register in a simultaneously multi-threaded processor
IBM4 citations62
US7761726B2Jul 20, 2010
Method and apparatus for fault tolerant time synchronization mechanism in a scaleable multi-processor computer
IBM1 citations61