Inventor
KAPADIA VIMAL M
US6 patents
⚠️ This page may combine multiple inventors who share the name “KAPADIA VIMAL M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
4 patentsUS7908518B2Mar 15, 2011
Method, system and computer program product for failure analysis implementing automated comparison of multiple reference models
IBM43 citations93
US7987343B2Jul 26, 2011
Processor and method for synchronous load multiple fetching sequence and pipeline stage result tracking to facilitate early address generation interlock bypass
IBM0 citations51
US7870314B2Jan 11, 2011
Method and system for implementing store buffer allocation
IBM0 citations40
US7962726B2Jun 14, 2011
Recycling long multi-operand instructions
IBM0 citations39