Inventor
DERVISOGLU BULENT
US11 patents
⚠️ This page may combine multiple inventors who share the name “DERVISOGLU BULENT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ON CHIP TECHNOLOGIES INC
6 patentsUS6687865B1Feb 3, 2004
On-chip service processor for test and debug of integrated circuits
ON CHIP TECHNOLOGIES INC110 citations98
US7197681B2Mar 27, 2007
Accelerated scan circuitry and method for reducing scan test data volume and execution time
ON CHIP TECHNOLOGIES INC39 citations95
US7200784B2Apr 3, 2007
Accelerated scan circuitry and method for reducing scan test data volume and execution time
ON CHIP TECHNOLOGIES INC26 citations92
US7188286B2Mar 6, 2007
Accelerated scan circuitry and method for reducing scan test data volume and execution time
ON CHIP TECHNOLOGIES INC32 citations92
US6964001B2Nov 8, 2005
On-chip service processor
ON CHIP TECHNOLOGIES INC12 citations92
US7080301B2Jul 18, 2006
On-chip service processor
ON CHIP TECHNOLOGIES INC8 citations73
CADENCE DESIGN SYSTEMS INC
3 patentsUS6631504B2Oct 7, 2003
Hierarchical test circuit structure for chips with multiple circuit blocks
CADENCE DESIGN SYSTEMS INC122 citations97
US6886121B2Apr 26, 2005
Hierarchical test circuit structure for chips with multiple circuit blocks
CADENCE DESIGN SYSTEMS INC60 citations96
US7181705B2Feb 20, 2007
Hierarchical test circuit structure for chips with multiple circuit blocks
CADENCE DESIGN SYSTEMS INC32 citations92