Inventor
NAIR PRASHANT JAYAPRAKASH
US8 patents
⚠️ This page may combine multiple inventors who share the name “NAIR PRASHANT JAYAPRAKASH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
5 patentsUS10558518B2Feb 11, 2020
Dynamic adjustments within memory systems
IBM9 citations83
US11095313B2Aug 17, 2021
Employing single error correction and triple error detection to optimize bandwidth and resilience under multiple bit failures
IBM2 citations66
US11334786B2May 17, 2022
System and method for an error-aware runtime configurable memory hierarchy for improved energy efficiency
IBM0 citations59
US10831669B2Nov 10, 2020
Systems, methods and computer program products using multi-tag storage for efficient data compression in caches
IBM0 citations50
US10423538B2Sep 24, 2019
Bandwidth efficient techniques for enabling tagged memories
IBM0 citations38