Inventor
EUSTIS STEVEN M
US13 patents
⚠️ This page may combine multiple inventors who share the name “EUSTIS STEVEN M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
12 patentsUS6928377B2Aug 9, 2005
Self-test architecture to implement data column redundancy in a RAM
IBM33 citations91
US6944075B1Sep 13, 2005
Variable column redundancy region boundaries in SRAM
IBM10 citations73
US5920222AJul 6, 1999
Tunable pulse generator based on a wave pipeline
IBM13 citations73
US6778419B2Aug 17, 2004
Complementary two transistor ROM cell
IBM11 citations71
US6721927B2Apr 13, 2004
Substituting high performance and low power macros in integrated circuit chips
IBM7 citations69
US6922349B2Jul 26, 2005
Complementary two transistor ROM cell
IBM3 citations60
US6600673B1Jul 29, 2003
Compilable writeable read only memory (ROM) built with register arrays
IBM5 citations60
US6570254B1May 27, 2003
Electrical mask identification of memory modules
IBM2 citations59
US7210085B2Apr 24, 2007
Method and apparatus for test and repair of marginally functional SRAM cells
IBM3 citations57
US7937632B2May 3, 2011
Design structure and apparatus for a robust embedded interface
IBM0 citations52
US6268228B1Jul 31, 2001
Electrical mask identification of memory modules
IBM0 citations49
US7404125B2Jul 22, 2008
Compilable memory structure and test methodology for both ASIC and foundry test environments
IBM1 citations47